JPRS ID: 9692 USSR REPORT CYBERNETICS, COMPUTERS AND AUTOMATION TECHNOLOGY

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• Release Decision: RIF
• Original Classification: U
• Document Page Count: 141
• Document Creation Date: November 1, 2016
• Sequence Number: 55
• Content Type: REPORTS

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JPRS L/9692
- 27 April 1981
U SSR Re ort
p
CYBERNETICS, COMPUTERS AND
AUTOMATION T~CHNOIO~Y
_ (FOUO 12/81~
FBIS FOREIGN B~OADCAST INFORMATION SERVICE
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NOTE
JPRS publications contain information primarily from forei~n
newspapers, perio3icals and books, but also from news agency
t:ransmissions and broadcasts. Materials from foreign-language
_ sources are translated; those from Englistc-language sources
are transcribed or reprinted, with the original phrasing and
other characteristics retained.
- Headlines, editorial reports, and material enclosed in brackets
are supplied by JPRS. Processing indicators suc~ as [Text]
ar [ExcerptJ in the first line of each item, or following the
last line of a brief, indicate how the orig~nal information was
processed. Where no processing indicator is given, the infor-
mation was summarized or extracted.
Unfamiliar names rendered phonetically or transliterated are
enclosed in parenthesese Words or names preceded by a ques-
tion mark and enclosed in parentheses were not clear in the
original but have been supplied as appropriate in context.
Other unattributed parenthetical notes within the body of an
item originate with the source. Times within items are as
giver: by source.
= The contents of this publication in no way represent the poli-
- cies, views or at.titudes of the U.S. Government.
COPYRIGHT LAWS AND REGULATIONS GOVERNING OWNERSHIP OF
- MATERIALS REPRODUCED HEREIN REQUIRE THAT DISSEMINATION
OF THIS PUBLICATION BE RESTRICTED FOR OFFICIAL USE ODILY.
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JPRS L/9692
_ 27 April 1981
USSR REPORT
y CYBERNETICS, COMPUTERS AND AUTOMATION TECHNOLOGY
(FOUO 12/81)
- CON TEN TS
Hax~waxE
Projected Development of Computer Technology 1
Operating System of the 'E1'brus-1' MVK Special Processor.......... 3
- Microprocessor Data Transmission Controller 4
USSR Proposes Technological Cooperatian With Japan's Robot
Manufacturer 5
~ Use of CA~fAC Modules for Distributed Control Systems 7
100-:ribyte Complex Based on Replaceable YeS5066 Magnetic Disc
Storage Devices and YeS5566 Control Devices 11
Cor.trol Screen Displays 13
- A Unit for Interfacing the 15VSM-5 Electronic Keyboard Computer
to Peripherals 14
- A Study of the Operational Capability of Relays With
_ H~rmetically Sealed Contacts 15
Devising Equipment Interchanges for Small-Computer Control
Complexes 16
Four Technologies for Making Small Magnetic Accumulators Compared.. 19
MICROPRUC~SSOR SYSTEMS
New Book Discusses Microprocessox Systems 22
M
Insuring Security of P~icroprocessor Data Processing Systems........ 26
- a- [III - USSR - 21.C S&T FOUO]
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Operating Capabiliti.es of Basic Unified System Units 40
SOFTWARE
Tools for Programming and Debugging K580 Se�ries MicroprocesGors.... 42
MIKRAS System of Microprogramming for Micr.ocomputers Built With
the S eries K589 Base 44
REZON: A System for the Solution of Planning and Control Problems
Prohl ems. The Underlying Concepts 46
A Method of Optimizing the Parameters of ~,arge Scale Integrated
Circuits 47
The Development of Machine Formats ir~ Data Banks and Centers....... 48
Experience With the Design o.`~ the Automated Information and
Reference System in the Institute of Electronics of the
Uzbek SSR Academy of Sciences 49
Experiment in Transferring Programs in the Assembler Language
- From the BESM-6 to the YeS Computer 50
New Book on Automated Production Control Systems Using Applied
Program Packets 52
Organiz ation of ASU Prog~am Produc.tion and Realization 56
APPLICATIONS
Pattern Recognition Research Organizations 60
Descrip tion of New M-60 Computing System for Industriai Processes.. 62
Questions Relating to Progra~ing Simulation Problems on the
M-10 Synchronous Multiprocessor Computer 66
Automat ed Control Systems: Experience and Prospects 78
On an Analysis of the Data Transmission Modes in the SUMMA
Compu ter System 81
Parallel Data Processing in the Homogeneous SUNA~IA Computer
System 82
Functional Subsystems of the Second Stage of the Energy Sector
_ A~itumated Control System 83
The State of the Art and :'rospects for Automated Control System
Uevelopment in Power Engineering 87
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Experience With the Use of the First Stage Data Bank and Set
_ of Programs for the Analysis of Developmental Variants
_ for Integrated Power Systems in the Subsystem for
Future Sector Development 91 -
Dispatching Geophysical Computing Complexes Based on the l
- PS-2000 Multiprocessor Computer 95
- CONFERENCES
- 16th All-Union Conference on Magnetic Elements of Automation and
Computer Technology....e 103
PUBLICATIONS
Table of Contents From the Computer Journal 'CYBERNETICS'.......... 109
- Abstracts From Xhe Journal 'CONTROL SYSTEMS AI~?D MACHINES'.......... 113
Regular Structures for Automaton Control 121
Selection and Application of Systems of Computer Logic Elaments.... 124
Problems of Random Searching: Questions of Structural
Adaptation 127 -
Bidirectional Signal Converters 129 =
Analog-Discrete Conversion of Signals: Conversion of Integral
- Characteristics of Wideband Signals 132
New Book on Data Compression De~~ices 134
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= HARDWARE
PROJECTED DEVELOPMENT OF COMPUTER TECHNOLOGY
Kiev NAUKOVEDENTYE I INFORMATIKA in Russian No 20, 1979 pp 82-88 manuscript received
19 May 78
[Article by B. Ador'yan, Hungarian People's Republic InsCitute oP Coordina~.ion of
Computer Technology, Budapest]
- [Excerpts] For the future it is possible to predict the formation of three major
, trends: 1) strengthening of the importance of dialog systems, in particular, on
account of package processing systems; 2) an increase in the proportion'of independ-
_ ent "small" systems and "built-in" small compute~s (micrr~processors); 3) an increase _
in decentralization and together with it an increase in the role of systems with
distributed parameters, or, in other words, of multiple systems.
- Part of the principles enumerated will be implemented in the next five to 10 years
with the further development of IBM systems and concomitantly with it of YeS [uni- _
fied series) computers, as well as in designs of so-called small computers.
In the future, in the following 10 to 20 years, simultaneously with an increase in _
the number and requirements of areas of appl.ication, and also depending on the furth-
er development of technology and improvement of the efficiency and reliability in-
dex, it is expected that the beginning of a polarized pracess is probable with con-
siderable improvement of data transmission capabilities, instead of the further de-
velopment of a family of computers in unmodified forms (e.g., the IBM 360, IBM
370, etc., in the West and the "Ryad" and "Ryad-2" YeS computers in the s~cialist
ca.mp), wY?ich play a dominating role at the present time and which constitute the
more important share of the quantity and total cost of computers. For the purpose -
of independent applications small computers and systems are being used, consisting
of basic elements manufactured with a relatively high degree of standardization
and having the capacity of programmability and a diversified structure for certain
special cases of application.
_ Concomitantly with an improvement in communication methods, incluc~ing the improve-
ment of reliability, and with a reduction in their cost in many areas of a~plica- ~
tion, the necessity will be increased for organizing superpower and power-line
systems with a separate computer "services" system. -
~ It follows, of course, from a development of this sort that units and small systems
made for an independent application wi11 be designed beforehand so that from the ~
1
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~ viewpoint of both haxdware and so~tware they ~11 be used as a"bui,].d:~ng element" -
in large systems.
Iiowever, it is necessary to Emphasize that already at the present time reliable data
transmission is causing very serious problem~ and together with the increasing
extension of the application of comnuter technology the amount o~ data to be trans- _
mitted and the demand for higher transmission reliability are increasing; therefore
if present communication does not change solidly for the better from the viewpoint
of technical parameters, reliability and financial outlays, then it can fundamental-
ly prevent the coming of the polarization trend described. (An indication of this -
_ problem is the fact, for example, that the IBM firm in the not too d.istant past
proluced not the previously announced 370/200 series, but the 3300 system.)
~'he satisfaction of security relates also to secrecy, i.e., to data's being ob-
tained only by competent organizations, enterprises and persons. This requirement
has posed a general need worldwide to develop methods of coding for networks, -
like the coding system of the IBM firm published in 1975, which can be easily im-
pl2mented and have high security.
- COPYRIGHT: Iz3atel'stvo "Naukova dumka", 1�79
[85-8831]
8831
CSO: 1863
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- UDC 681.322.066 ~
OPERATING SYSTEM OF THE 'EL'BRUS-~1' MVK SPECIAL PROCESSOR
_ Moxcow IN-T Toch. MEKH. I VYCHISL. TE'~iN. AN SSSR PREPR. in Russian No 15, 1980, �
27 pages
TSANG, F. R. '
_ [From REFERATIVNYY ZHURNAL, AVTOMATIKA, TELEMEICHEINIKA I VYCHISLITEL'NAYA
TEKFINIKA No 9, 1980 Abstract No g B132 summary]
[Text] The purpose of the "E1'brus~l" MVK [minicomputer complex] special pro-
cessor (SP) is to provide compatibility between the MVK and computers of the -
BESM-6 type. Compatibtlity asrumes the ability of the admission to the MVK of
- routines executed on computers of the BESM-6 type in the non-privileged mode.
_ These routines contain non-privileged operation codes and extra codes; the former -
are executed bp the hardware and the Zatter are interpreted by the operating
- system. Since the "E1'brus-1" MVK SP co~and system includes completely the
non-privileged co~an3s of the BESM-6 computer, then the required compatibility
is made possiFile fiy identical interpretafiion of extra codes by the SP's operating
~ system and the basic operating system of the BESM-6, as which Is used the DISPAK
operating system. 6 references.
COPYRIGHT: VINITI, 1980
Is4-ss3i]
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UDC 681.326.34
MICROPROCESSOR DATA TRANSMISSION CONTROLLER
- Riga PROB. SOZDANIYA, PR-VA I PRIMENENIYA SREDSTV VYCHISL. TEKHN. NA OSNOVE MIKRO-
PROTSESSOROV I DR. SOVREM. ELEMENTOV MIKROELEKTRON in Russian 1980 pp 61-63
_ IVANOV-LOSHKANOV, V. S. , SEMEMOV, M. N. . TRAYNIN, S. B. , ~'AZ,~KOVICH, E. I. ,
FOGEL', V. A. and F1tENKEL', A. M.
[From REFERATIVNYY ZHURNAL, AVTOMATIKA, TELEMEKHANIKA I VYCHISLITEL'NAYA
TEKHNIiZA No 9, 1980 Abstract No 9 B575 suffinary] .
[Text] A microprocessor data transmission controller (MKPD) is discus~eed, which
- is designed for connecting ~he "Iskra-126" minicomputer to teleprocessing systems
as a user station, as well as to a computer netarork via an interface terminal
- computer. The controller makes it possible to work through switched or assi.gned
telephone lines in the synchronovs and start-stop modes. The data exchange rates
are 100, 200, 300, 600, 1200 or 2400 bauds. The MKPD makes gossible automati~
conn.ection to a line i~t the presence of a call from the opposite end. The data
transmission method is character bq character. The MKPD is a message buffer.
' Ir~ the presence of errors the MKPD makes possible reinquiry of the incorrectly
received package. The ability to select the data format is provided (o~ld or
_ even parity check, number of bits of data in a character, number of stop bits).
_ The data transmission control program is loaded prior to the communication ses-
- sion af the controller's working storage.
COPYRIGHT: VINITI, 1980
j 84-8831_]
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USSR PROPOSES TECHNOLOGtCAL COOPEtZATION WITN JAPAN'S ROBOT MANUFACTURER -
Tokyo NIKKEI SANGYO SHIMBUN in Japanese 9 Mar 1981 p 6
- [Article: "Industrial Robot: USSR Proposed Technological Co~peration With
: Japan's Robot Manufacturer"]
[Text] The Soviet government recently asked the Japan Robot Manufacturing
Company, Inc. (JRM) to participate in cooperative venture in the field of in- -
dustrial robot technology. The head office of JRM is located in Tokyo and is -
headed by Kenro Motoda [transliteration]. It is capitalized at 50 million yen.
The Sov~ets said that they sought Japan's robot technology because they consid-
- ered it urgently necessary to increase their productivity through rationalization
- and ]_abor-saving efforts, and to relteve factory workers from dirty work. The
- Soviet government is currently constructing a large-scale robot manufacturing
factory in the suburbs of Moscow, and is thinking of i~porting Japan's rohot
technology to use in this Moscow factory. The details of the Soviet proposal
to JRM are not clear, however, the Soviets are planning to import Japan's most
advanced plectronic technology in this field, which tncludes visual and tactile
' , robot sensors.
Farlier this year, the Soviets proposed technological cooperation with the
Mitsubishi Heavy Industries, Ltd. in the field of industrial robot technology.
This is ttie first time, however, that the Soviets suggested technological coopera-
tion with a manufacturer that specializes in robots. Based on this, it is consid-
ered that the Soviets have begun vigorous efforts to carry out technological
exchange with Japanese robot manufacturers.
In the JRM venture, the Soviets wish to acquire robots for handling operations.
They are particularly interested in the sensor technology that is essential for
- handling operations. They also intend to import the rnicrocomputer technology
which controls robots hased on information obtained through sensors.
In the llth Five-Year Plan (1981-85) draft, the Soviet government has established
a goal to ra~se productivity through factory automation and to relieve factory
arorkers from dirty work under urfavorable working conditions. To achieve this -
goal, the Soviet government is promoting an effort to supply industrial robots
to factories on a massive scale. The Soviets are building a large robot factory
in the Moscow suburbs and are developing a plan to concentrate all of the world's
most advanced robot tec~?nologies in this factory. ~
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JRM was established in fall 1979 as an independent company formed from the robot _
_ department of Motoda Electronics (the main office of Motoda Elcctronics is lo-
cated in Tokyo and headed by Kenro Motoda. It is capitalized at 20 million
yen), and Toyo Terminal. JRM is a medi~un size company in Japan with an annual
sales totaling 2,500 million yen. It has exported its independently developed
handling robots to Sweden's automobile maker Volvo and co the Soviet Union.
JRM is also developing various position sensors and systems which simultaneously
' control multiple robots. JRM considers that the Soviets have appreciated the ~
~ company's achievement. JRM has already started negotiations ca~th the Soviets
and is expeci:ing thaC both parties will further their negotiations.
Last year, the Japanese robot industry manufactured 22,000 robots and sales
totaled 62,000 million yen. It is reported that Japan now has 75,000 operating
rohots, that is, 70% of the total number of robots in the world. Robot produc-
= tion is expected to increase at an annual rate of 40% for a while and is projected
.to reach 300 billion yen in 1985. Because the Soviets are very interested in
Japan's roboc technology, which is the most advanced in the world, there is a
strong possibility that the Soviets will propose cooperative ventures with other
robot manufacturers.
COPYRIGH'T: Nihon Keizai Shimbunsha 1981
[141-P~ .
CSO : 4105
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UDC 681.142.353
USE OF CAMAC MUDULES FOR DISTRIBUTED CONTROL SYSTEMS
Moscow PRIBGRY I SISTEMY UPRAVLENIYA in Russian No 12, Dec �~0 pp 16-18
[Article by E. M. Gleybman and V. V. Tarasov, engineers: "Set of Electronic
Modules for Distributed Systems for Ccntrol of Physical ~quipment"]
[Excerpts] One of the widespread standards for electronic apparatus in the
world's physics laboratories is the CAMAC modular system of electronic units
~ [1]. It is used extensively in industry, medicine, and other fields today.
The assortment of modules produced now numbers more than 1,000.
With the appearance of inemory microcircuits and microprocessors it becomes
possible to connect a microproces~sor controller to the set of CAMAC modules.
This controller has a large computing capacity [2]. This, in turn, creates
the prerequisites for distributed control systems [3, 4].
This article describes a set of electronic modules which includes an autono-
- mous MTKAM-2 microprocessor controller, which is a further development of the
MIKAM-1 controller [5J, and memory modules.
The MIKAM-2 autonomous crate controller (see Figures 1[below] and 2) is
- constructed in the form of a triple-width CAMAC module and installed in the
crate in place of the control station and two standard stations. It pro-
vides two-way data exchange between the controller and any CAMAC module;
- processing and control of interrupts; computations during the r_ollection of
data; two-way communication with a teletype and display; communication with
the central computer or other MIKAM-2 controllers.
The controller consists of a microcomputer on one printed plate and a CAMAC
- interface. The microcomputer has a functionally complete Intel 8080 micro-
processor (the domestic analog is the~K580IK80 [6]), a random access semi-
conductor memory with a capacity of 1,000 bytes (K565RU2 circuit), a re-
programmable permanent memory with a capacity of 4,000 bytes (Intel 2708
[7]), interrupt control circuits, circuits to receive digital information
from the front panel of the controller, a real-time clock, and a sequential
interface of the external devices and the commutator.
The RAM-4K random access internal memory unit (see Figure 3[not reproduced])
is designed to work as a supplementary memory module to the MIKAM-2 autonomous
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crate controller. The unit
has a capac~.ty of 4,000
bytes and a read-write time _
cycle ~f 0.6 microseconda. ~
The storage is built with
static Intel 8101 type mem-
- ory elements with an infor-
mation c.apacity of 1, 000
~
bytes per crystal with
256 x 4 positions. It is a
- matrix with four linas of _
eight elements apiece . The
elements of each line are
joined in pairs and selected
- by one CE signal, forming .
a memory element that is
256 x 8. The presence of ~
a three-state huffer at the -
output of the memory micro- _
circuits made it possible -
to organize a two-direc-
tional data line inside the
- Figure 1. M1KAM-2 Self-Contained module. -
Crate Controller
, In design terms the 12AM-4K
module is built in the form =
- of a CAMAC module of ordinary width. Its power supply is +S volts and it
consumes 1.2 amps of current,
Th~e OZU-4K random-access internal memory unit (see Figure 4[not reproduced])
is a supplementary memory module for the autonomous MIKAM-2 crate controller.
T}ie storage capacity is 4,000 bytes and the read-write time cycle is 0.6
::~icroseconds. The storage is constructed of static series K565RU2 memory
elements with an information capacity of 1,000 bits per crystal with N
- 1024 x 1 positions. It is a matrix with four columns of eight elements _
~ apiece. The eight elements of one column, that is 1,000 bytes, are selected
by a CS signal.
The OZU-4K :nodule can be used as a supplementary memory unit of the analyzer.
To do this the module control circuit envisions the possibility of adding a
unit (one) to the memory cell according to the address coming through the
supplementary plug on the back panel. In this mode the OZU-4K module is a
memory unit with a volume of 2,000 x 16 digital words.
The contents of the memory cell at the address coming from the plug on the
back pan~l of the module are read into the data register-counter, increased
by one, and copied into memory at the same address. The OZU-4K module can
work autonomously with an external power source or together with the MIKAM-2
controller. Synchronization of access to storage in the latter case is ac-
- complished by internal control circuits. Up to four modules working with
one external source can be ~oined using a special unit number switch. In
design terms the OZU-4K unit takes the form of a CAMAC module of ordinary -
8 -
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width. The supply voltage is +S volts and it conaumes 1.7 amps of -
current.
The OZU-lOK random access internal memory unit (see Figure 5[not reproduced])
. is designed to work as a supplementary memory unit for the MIKAM-2 autono-
mous crate controller. The capacity of the unit is l0,OQ0 by~es. . _
The storage is constructed with series K507RU1 dynamic memory elements with
an information capacity of 1,000 bits per crystal organized in 1024 x 1 _
positions. It is a 10 x 8 matrix.
The PROIti-8K permanent reprog:ammable memory unit (see Figure 6[not repro-
_ duced]) is used as a supplementary permanent memory unit for the MIKAM-2
autonomous controller. The unit stores subroutines, constants, and user
programs. It has a capacity of 8,000 bytes and a data read time of one micro- -
second.
The storage is built on an Intel 8702 type permanent reprogrammable me~rory
unit and has an information capacity of 1l000 bits per crystal organized with
256 x 8 positicns. 'Phis is a matrix of 32 such elements. One of the 32 ele-
ments is selected by a CS sign3l. All the permanent programmable memory
_ matrices are mounted on a panel which permits easy replacement of the memory -
element in use, when necessary. -
In design terms the PROM-8K unit has the form of a CAMAC module of ordinary -
width. The supply voltage is +5, -24 volts and the current consumed is 900 -
and $00 milliamps respectively.
Use of the CAMAC modular system with a microprocessor controller and memory
: modules makea it possible to build inexpensive and flexible distributed con-
trol systems for use in physics experiments, medi~ine, industry, and other
technical fields.
~ BIBLIOGRAPHY
1. "~CAMAC - A Modular Instzumentation System for Data Handling Revised.
Description and Spacification," Commission of the European Communities,
EUR 4100e, 1972. _
2. Barnes, R. C. M., "Microprocessors and CAMAC," CAMAC BULLETIN, 1975,
No 14.
3. Nemesh, T., Rapp, Kh., Rottel'bush, L., and Slepnev, V.M., "MISKA
Microcomputer in the CAMAC Standard, Its Use for Monitoring the Internal
Nuclear Beam of the OIYaA [Joint Nuclear Research Institute] Proton
Synchrotron," OIYaI Report R10-12077, Dubna, 1979.
4.. Glasnek, K.-P, et al, "A Microprocessor System for Calibration and -
- Monitoring of the RISK Experimental Device,1� OIYaI Preprint R10-12555,
- Dubna, 1979.
4. _
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5. Glasnek, K.-P., and Gleybman, E. M., "The MIKAM-1 Self-Contained Crate
Controller Based on a Microprocessar," OIYaI Preprizt R10-10893,
Dubna, 1977.
6. Prole~ko, V. M., "Microprocessors, Microcomputers, and Their Develop-
ment," ELEKTRONNAYA PROMYSHLENNOST', 1979, No ].1-12.
7. "MCS-80 ~User's Library," Intel Corporation, Santa Clara, California, 1977.
COPYRIGHT: Izdatel'stvo "Mashinostroyeniye", "Pribory i sistemy upravleni}~a",
' 1980
[87-11,176]
11,176
CSO: 1863
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100-MBYTE COMPLE~ BASED ON REPLF,CEABLE YES5066 MAGNETIC DISC STORArE DEVICFS AND ~
YES5566 CONTROL DEVICEG
Kiev UPRAVLYAYUSHChIYE SISTEMY I MASHINY in Russian No 6, Nov-Dec 80 p 153
[Article] -
[Text] The 100-t~yte complex is a new step in development of the external memory
. of computers. Compared to the extensively used replaceable YeS5050, YeS5052 and
YeS5056 magnetic disc stores (N[~iD), the YeS5066 device has 13-foid grea~er capacity
and high technical and economic indicators. The YeS5066 external storage device
_ together with other computer equipment permits one to organize a virtual memory in
models o~ the second unit of YeS EVM [Unified computers svstem].
The typical component of the YeS5066 NMD is a replaceable disc packet which has a
standarci version and corresponds completely t~ ISO [expansi.on unknoam]
recommendations.
The packet includes 12 discs c:~ which are arranged 19 information surfaces and one
special servo surface for accurate positioning of the heads. Each working surface
has 411 tracks. Ferrovarnish is used as the maqnetic coating of t;ie disc s w:face.
The latest technica.l advances have b~en applied in the YeS5066 storage device:
---a line motor for driving the carriage unit holding the magnetic heads (the
magnetic heads are made of high-quality ferrite and the f.loatinq elements is made
o� hard. ceramic alloy);
--a developec~ diagnostic system has been implemented which, together with the '
built-in test system of the YeS5566 control device, provides rapid detection and
correction of malf~.inctions;
--spPCial error correction codes provide high reliability of information
storage.
Connecting the YeS5066 storage devices to computers is provided bv the YeS5556
control device, which is in turn connected to the computer channel through a stan-
dard interface. Using a two-channel switch: the cantrol device can operate in the
multisystems mode. Data are transmitted between the control device and the channel
- by 8-digit bytes with an additional control digit, while they are transmitted be-
tween the control device and the storage device digit by digit using cyclic
11
_ FOR OFFICIAL USE ONLX
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} ~
'f;t
; _ ~r. -
4r
~ S T l J�. � S~ ~S'.+~A~.u. T )
. 1 .
~
~ ~ . ~ql i-
. ~ . . ,,,~u , ~ ~ _
, � 1 >dt""'- -
_
r;,:~+.
?;:i~
~1~
~ ~ ~
r'.{.
ki~-',~
_ �~fi`~'~s~:
"+k
. Ji'~~:.k'~ .
.ti ~~~f~'~
_ ;~~~�~~y
A ,
ti _ r : .
monitoring of the data files. Microprogramming is used in the YeS5566 device. The
developed hardware and software system provides checking of data to be processed,
_ checking of the efficiency of starage devices and search for malfunctions.
The Ye55566 control device is based on a typical rack and extensively uses unifica-
tion and standardization of assemblies and blocks.
Specifications _
Capacity of a single disc packet 100 Mbytss
Method of recording Modified phase regulation
- Linear density of recording 159 bits/mm
Information access time 55 ms
Disc rotational =requency 3,600 rpm
Data transmission rate 806 Kbytes/s
" tlumber of storage devices connected to Up to 8
device
Component base Integrated circuits and
digital components
Overall di.mensions:
YeS5066 storage device 630 X 735 X 1,135 mm
Ye55566 control device 1,200 X 860 X 1,600 mm
COPYRIGH~': IZDATEL'STVO "NAUKOVA DUMKA" "UPRAVLYAYUSHCHIYE SISTEMY I t,9ASHINY" 1980
[102-6521]
_ CSO: 1863 12 -
FOR OFFICIAL USE ONLY
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' UDC 681.327.69'22.022
CONTROL SCREEI~ DISPLAYS
_ Serpukhov INSTITUT FIZIKI VYSOKIKH ENERGIT.. SERPUKHOV. PREPRINT ir~ Russian No 88,
1980 pp 1-10
ANIKEYEV, V. B. , DU;~TAYTSEV, A. F. , ZHIGUNOV, V. P. , ZOTOV~ V. A. , KLILIKOV, V. A. ,
UTO CHKIN, S. A. and SHAMSUAROV, A. D. _
(From REFERATIVNYY ZHURNAL: AVTOMATIKA, TELEMEKHANIKA I VYCHISLITEL'NAYA
TEKHNIKA in Russi.an No 12, 1980 Abstract No 12B693]
[Text] A display with a control screen is a convenient means of interacting
wlth a computer. In structural terms, the controlling screen is made in the
form of a transparent mask, superinposed on the screen of the display CRT.
Touching a finger to one of the 8 x 8 zones of the mask gives an indicati.on
for the execution of an action, the designation of which is written on the
screen of the display at the given point. A keyboard answering the needs of
the prohlems being solved can be created by purely programming means on the
screen of tfie display. The engine~ring aspects of the design are treated as
well as the pxinciples of :he software for a control screen. Figures 5;
references 10.
COPYRIGHT : VINITI , 1980
[91-8225.]
- 13
FOR OF~ICIAL USE ONLY
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- UDC 681.327.2
A UNiT FOR INTERFACING THE 15VSM-5 ELECTRONIC KEYBOARD C02~UTER TO PERIPHERALS =
Dimitrovgrad NAUCHNO-ISSLEDOVATEL'SKIY INSTITUT ATOMNYICH REAKTOROV. DIMITROVGRAD.
PREPRINT in Russian No 26/434, 1980 6 pp
GL'JSHAK, N. S., LOGINOV, V. D., KHUDYAKOV, V. A. and SHIPILOV, V. I.
jFrom REFERATIVNYanZNo~~:1980
Abstract NoLl B7K14]I~ I~~ISLITEL'NAYA -
TEKHNIKA in Russi ~
[Text] A unit for interfacing computers of the 15VSM-5 type to peripherals (PU),
incorporated in the multichannel radiometric system for data collection and pro-
cessing, is descrihed. The interface serves for the organization of data exchange
between the 15VSM-5 computer and the peripherals in accordance with the program
specified by the 15VSM-5 computer. The form of data representation in the peri-
pherals is either binary or binary-decimal. The number of data bits is 24 and
there are 6 binary-decimal bits. The number of peripheral addresses in the inter-
face system runs up to 510. The interface generates the number of the requisite
word length.from a series of byte transmissions from the 15bS~e5recePtion~inr he -
mits the number to the peripheral and provides for byte-by- y P
computer of the number of the requisite word length from the peripheral. More-
over, the interface receives from the computer and transmits the address of the
peripheral with which the communications are carried on. The binary data incoming
from a peripheral is also converted in the interface to the hinary-decimal form
needed for its reception in the 15VSM-5 computer. In structural terms, the
coupling interface is designed as a unit of double width to the "Chereshnya"
- standard. All of the assemblies200 tacka es.arFiguresn2a referenceslls 155 IC's
with an overall number ot about p 8
COPYRIGHT: VINITI, 1980
j91,s225~
1.4
FOR OFFICIAL USE ONLY
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~ FOR OFFICIAL USE ONLY
_ ~
- UDC 681.584.782
A STUDY OF THE OPERATIONAL CAPABILITY OF REL~.YS WITH HERMETICALLY SEALED (;GNTACTS
Riga RAZVITIYE, VNEDRENIYE I EKSPLUATSTSIYA SREDSTV SVYAZI. VSESOYUZNYY NAUCHNO-
TEKHNICHESK"iY SEMINAR,~RIGA in Russian 1980 pp 65-66
KALININA, K. G., LUKS, A. G., PETERSQN, L. P. and SILIN'SH, Ya. Ya.
jFrom REFERATIVNYY ZHURNAL: AVTOMATIKA, TELEMEKHANIKA I VYCHISLIT~L'NAYA
TEKHNIKA in Russian No 12, 1980 AT~stract 12A29 by A. M. Pshenichnikov]
jText_] The results of a study of type RPS domestically produced hermetically
sealed contact relays and RGK-27 and RGK-36 relays produced by the German Demo-
cratic RepuDlic are presented. During testing of the contacts for the effect
_ of vibration, the noise and pulse resistance as well as the number of open cir-
_ cuits per unit time were determined. The minimum value of the acceleration at
which a sharp increase in the noise resistance was observed at the resonant
frequency was 2.5 m/sec2. The RGK-36 relays proved to have the highe~t quality
based on the test results.
GOPYRIGHT: VINITI, 1980
, j91-8225]
15
FOR OFFIC~AL USE ONLY -
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UDC 681.323 _
DEVISING EQUIPMENT INTERCHAN~ES FOR SMP.LL-COMPUTER CONTROL COMPLEXES
Moscow PRIB~RY 1 SISTEMY UPRAVLENIYA in Russian No 12, Dec 80 pp 6-8
[Article by S. I. Samarskiy, candidate of technical sciences: "Organization
of Efficient Control Systems Based on SM-3 and SM-4 Control Computing Com-
plexes Using WM M-6000, M-7000, SM-1, and SM-2 Peripheral Equipment"]
[Excerpts] Development of the architecture of the system of small electronic
computers (SM EV) has taken two basic directions. The first models SM-1 and =
SM-2 with system interface 2K [1] were based on the small M-6000 and M-7000
computers. The architecture of the later models SM-3 and SM-4 with the sys- ~
tem interface OSh ("common line") [2] was based on the architecture of small
- M-400 computers. -
The control complexes of the SM-1 and SM-2 have a broad assortment of units
for communication with the object (USO's) because all the peripheral devices
- developed for tl,e M-6000 and M-7000 control computing complexes, in particu-
lar the devices for communication with the object, can also be used generally
in the SM-1 and SM-2 control computing complexes. In addition, a number of
new modules of devices for communication with the objecthave been developed
or are in the development stage for the SM-1 and SM-2 complexes.
Durir.g development of peripheral equipment for the SM-3 and and SM-4 con-
~ trol computing complexes attention was focused on system devices. As a
result a short~~ge of peripheral devices for communication with the object -
occurred.
The Kiev Electronic Computing and Control Machine Plant developed and has
begun producing a general-purpose device to match the OSh and 2K linkages.
This device, the USS OSh/2K, makes it possible to use peripheral equipment
- f.rom the SM-1, SM-2, M-6000, and M-7000 control computing complexes (in-
cluding a broad assortment of modules for communication with the object)
in the SM-3 and SM-4 complexes. This is useful not only because it elimi-
nates the above-mentioned shortage and makes it possible to avoid dupli-
cation in development work, but also because it permits efficient use of
modules for communication with the object in the SM-3 and SM-4 control
computing complexes.
In order to have identical or similar system characteristics for the complex
when it is using both its own and external units of the complex that are
16
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.
FOR OFFICIAL USE ONLY
- connected to it through the matching unit, this unit must be built so that
the service program of the borrowed external device "does not know" that it
; is connected to the complex through the matching unit. ~n other words, this
program should not contain actions that are dstermined by the presence of
the matchins units.
The system characteristic3 of the SM-3 (SM-4) complex with external devices
of the SM-1 (SM-2, M-60U0, M-7000) control computing complex are determined
_ by how the device for matching the OSh and 2K interfaces (the USS OSh/2K)
is made.
_ The efficiency of the method chosen for matching the OSh and 2K interfaces
depends entirely on taking full advantage of the strengths of these inter-
faces and avoiding their shortcomings. Let us consider the 2K and OSh
system interfaces to evaluate the effectiveness of different ways of
constructing the USS OSh/2K.
Series production of equipment for communication with the object for the
SM-3 and SM-4 control computing complexes (RSS OSh/2K expanders and frames
for units for co~r.munication with the ob~ect) with software was inco~porated
~n 1980.
The USS OSh/2K and RSS OSh/2K devices make it possible to connect a broad
assortment of 2K peripheral equipment to the SM-�3 and SM-4 complexes. Using
modules of devices for communication with the object from the equipment of
" the SM-1 and SM-2 complexes in the SM-3 and SN:-4 complexes makes it possible
to build efficient control systems without developing OSh peripheral equip-
ment.
,
In addition to connecting VU2K and SM-3 and SM-4 complexes the USS OSh/2K
unit may be used to organize multimachine computing complexes with SM-1,
SM-2, SM-3, SM-4, M-6000, and M-7000 control computing complexes. Two
duplex registers connected by cable are used for this purpose to organize
two-way exchauge of data files between the SM-3 (SM-4) and the SM-1 (SM-2,
M-6000, M-7000) control computing complexes. One of them is mounted in the
USS OSh/2K interface module and the other at the appropriate interface
, point in the SM-1 (SM-2, M-6000, M-7000) control co~nputing complex. The
duplex register is a W2K arranged on an interface printed plate and designed
to organize two-way data exchange among the SM-1, SM-2, M-6000, and M-7000
complexes.
ir. is possible in principle to organize analogous multimachine complexes in- -
cluding SM-3 and SM-4 units. To do this two USS OSh/2K's and two duplex
registers are used in each case to organize two~-way exchange among the com-
- plexes.
Figure 2[not reproduced] gives a schematic diagram of the organization of
multimachine control computing complexes containing SM-3 (SM-4) and SM-1
(SM-2, M-6000, M-70C0) units.
17
~ FOR OFFICIAL USE ONLY
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1. "OST [All-13nion Standard] 25-721 - 78. The 2-K Interface."
2. "OST 25-795 - 78. The 'Common Line' Ii.iterface."
COPYRIGHT: Izdatel'sc.vo "Mashinostroy~eniye". "Pribory i sistemy
upravleniya", 1980 _
~s~-ii,1~6~
i1,176
C50:1863
18
FOR OFFICIAL USE ONLY
,
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.
~
UDC 1.327.2:621.318.13 -
FOUR TECHNOLOGIES FOR MAKING SMALL MAGNETIC ACCUMULATORS COMPARED
Moscow PRIBORY I SISTEMY UPRAVLENIYA in Russiar. No 12, Dec 80 pp 34-35
[Article by I. P. Dorofeyeva, T. L. Kiyskyula, and A. A. Khramov, engineers,
and candidate of technical sciences G. D. Timofeyev: "Selecting Technology
for the Manufacture of Small-Capacity Magnetic Internal Memory Units"]
[Text] Iskra-type electronic programmable keyboard control register and
bookkeeping machines are now in series production. They use a magnetic in-
ternal memory unit based on a module with a capacity of 1,000 bytes
- (1,000 x 8 internal memory) organized on a 3 x 4W system with ferrite cores
one millimeter in diameter (see Figure 1[not reproduced]). Because the
volume of production of these machines is running into thousands a year and _
- ahows a tendency to continue increasing, it has become necessary to select
and implement technology for making the basic (in terms of specific cost and
labor-intensiveness) assembly of the memory unit, the magnetic accumulator
(see Figure 2[not reproduced]). The technological process of wiring a
_ amall-capacity (1,000 x 8) magnetic accumulator should provide high-quality
manufacture with minimal labor-intensity and cost.
There are four main ways today of wiring ferrite core accumulators: manual,
manual using masks, ~echanized, and fragmentary using masks. Calculations
of the labor-intensity of wiring magnetic accumulators by these four methods
' are give n in the table below.
Manual wiring of the OZU 1,000 x 8 ma gnetic accumulator is done with a rela-
tively simple apparatus. The ferrite cores are set on the wires of the
coordinates which are then secured in the apparatus for wiring. When wiring
the lines of the second coordinate the wiring worker manually orients the
position of each ferrite core according to the diagram for the magnetic ac-
cumulator. The "Read" and "Inhibit" lines are wired manually in sequence.
~ This method of wiring is simple. It does not require significant expenditures
to manufacture the pieces. Its drawbacks are the high labor-intensity and
. inevitability of errors when the ferrite cores are oriented manually.
For manual wiring using masks the main things needed are the masks themselves
and an apparatus to hol~ them. The mask is a bronze plate with holes ar-
ranged according to the topology of one bit position of the magnetic accumu-
lator. The holes in the mask are filled with ferrite cores on a special -
device. A needle is soldered to the end of the installation wire for con-
venient wiring. All four lines are wired manually.
11
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Manual-Using Fragmentary
Manual Masks Mechanized Using Masks
Number of Assemblers 1 1 2 1
A aratus Devices Apparatus Apparatus, Set of devices Set of de-
pp ' Masks vices, masks
Adjustment and Servicing of - - Ad~ustment and Servicing
Apparatus anC Devices
Labar-Intensiveness of Prepar- - 4* 1 4
_ ing.Apparatus and Devices
~ for Wiring, in norm-hours
Labor-Intensiveness of Wiring
in Norm-Hours
First Address Lines 1.5* 1.5* 3 Q�5
- Second Address Lines 28 * 1,5* 0.5 0.5
Read and Inhibit Lines 18 * 18 * 18 * 18 *
Total in Norm-Hours 47.5* 25 * 22.5* 23
Note; The labor-intensity figures marked with the asterisk have been
confirmed directly for the OZU 1,000 x 8 magnetic accumulator by
' experimental data
The labor-intenciveness of wiring is decreased by the use of masks. The n~:ed
for complex equipment is eliminated and there is complete freedom in orient-
ing the ferrite cores. The number of terminals of the magnetic accumulator
is two-fifths of the number with manual wiring. In addition, it is possiblP
to reduce the clearances between the cores significantly, which improves the
quality of the magnetic accumulator because the number of microcracks and
- puncCureg in the ferrite cores occurring during wiring is reduced. The
- spread of this technology is being held back somewhat at present by the rela-
~ively high labor-intensiveness of making the masks.
Mechanized wiring was developed at the computing center of the Siberian
Department of the Academy of Sciences USSR for large-capacity magnetic
accumulators and has been implemented at a number of enterprises with series
p roduction. The propose~ technology makes it possible to put the ferrite
cores on the assembly wire automatically and wire the lines of the second
co~rdinate wirh an assigned orientation of the ferrite cores. The other two
- lines are wired manually. This method of wiring requires complex and expen-
sive equipment, plus two wiring workers working together, and constant
~ qualified adjustment and servicing of the equipment.
A fragmentary technology has now been developed to ~vire magnetic accumulators
using masks. After they are filled on a special device the masks are secured
- to a setting table which then moves in the direction of the assembly wire.
The wire assumes the apprapriate direction and enters the rank of ferrite
cord being wired. The second coordinate is wired in the same way. Five-ten
20
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percent of the rank of ferrite cores of the magnetic accumulator are examined
manually. Manual wiring of the last two lines is still used. This device
is expensive to manufacture and needs constant, qualified servicing.
As the table shows, manual wiring requires the greateat labor input. The
_ other three variations differ from one an~ther in labor intensity by less
than 10 percent. However, the last two alternative wiring technologies in-
volve significant initial e~cpenditures to manufacture the equ:t.pment and for
subaequent qualified servicing of each unit. A gain of ~ust 10 percent in
labor-intensiveness does not ~ustify the manufacture and operatian of complex
equipment for mechanized wiring or the fragmeztary technology.
On the basis of this analysis we recommend that small-capacity magnetic ac-
cumulators be wired manually using masks. These recommendations have been
implemented successfully at several enterprises which are producing small-
capacity magnetic internal memory units, above all the OZU 1,000 x 8 module.
COPYRIGHT: Izdatel'stvo "Mashinostroyeniye". "Pribory i sistemy upravleniya",
1980
- Ls~-ii,i~6 )
11,176
CSO:1Fs63
21
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MICROPROCESSOR SYSTEMS
- NFW BOOK DISCUSSES MICROPROCESSOR SYSTEMS
Moscow MIKROPROTSESSORNYYE SISTEMY in Russian 1980 (signed to press 26 Jun
80) pp 2, 5, 236-237
- [Annotation, excerpt of~~introduction, and table of contents from book
"Microprocessor Systems , by Iveri Varlamovich Prangishvili and Gennadi.y
Georgiyevich Stetsyura, Izdatel'stvo"Nauka'; 9,750 copies, 240 pages]
[ExcerptsJ Annotation
This book reviews the structures and interaction procedures of micro-
processor modules in data processing systems and the organization of multi-
microprocessor distrib uted and concentrated control systems. It describes
the interaction procedures of processors in data processing systems.
Various methods of switching in systems and control of data exchange are
pr.esented. The authors identify solutions that afford rapid interconnection -
of un:its with simple connecting structure. Decentralization of control of
data exchange is considered. The book offers a number of control structures
and algorithms oriented to d ifferent classes of systems. The inf luence of
the mechanism of interaction on the possibilities of executing computations
in the system is demonstrated. The book includes a survey which allows an
assessment of the possibilities of performing parallel computations in
~ multimicroprocessor systems and reviews the most noteworthy concepts of
multimicroprocessor systems published in recent years. -
The book contains 17 tables, 136 illustrations, and 190 bibliographic
entries. ihe responsible editor of this work is E. A. Trakhtengerts. _
Introduction
This book attempts to evaluate which concepts in computer technology and
associated areas are beginning to influence microprocessor technology and
may be used to organize microprocessor data processing systems.
The book r.eviews the basic features of the structure of microprocessors,
the organization oF concentrated and distributed multimicroprocessor sys- -
tems, and the requirements imposed on them. It describes interaction pro-
cedures for processors in data processing systems and the effect of the
organization of connections among technical devices within the system on ;
th~se procedures. It considers the execution of parallel computations,
22 .
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- one of the important spheres of application of microprocessor systems. There
is further consideration of varioua methods of organizing links in the sys- -
tem, methods of switching information sources and receivers, and control of
data exchange. Concepts which afford rapid interconnectia of devices with
a simple counecting structure are singled out. Therefore, attention is given
to systems with standard bus structure, which is widespread both in micro-
- processor systems and in the apparatus with which microprocessor systems
_ must interact. One of the chapters reviews the issues of data protection,
which are particularly interesting for distributed systems. The book pre-
sents the results of work done on decentralization of control of data ex-
change at the Institute of Control Problems of tfie Academy of Sciences USSR.
A number of control structurea and algorithms oriented to different classes -
_ of systems are given. The authors demonstrate that these algorithms can be
applied to the organization of computations in a common channel. Computa-
_ tion in a common channel is proposed as the development of the technology of
associative memory devices for multiprocessor and distributed systems which
in many cases permits replacement of work with memory devices by processing
signals sent by components of the system into the comuon channel. The
final chapter describes the most noteworthy multimicroprocessor systems dis-
cussed in the published literature in recent years.
Because the terminology of microprocessor systems, particularly distributed _
ones, is not firmly established yet, a number of the terms used in the book
_ should be viewed only as tools essential for writing the book.
Table of Contents Page
- Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Chapter 1. Microprocessors, Microprocessor Systems . . . . . . . . 6
1.1. Microprocessors . . . . . . . . . . . . . . . . . . . . 6
1.2. Microprocessor Systems with Orte Processor 11
1.3. Concentrated Multimicroprocessor Systems . . . . . . . 15
1.4. Mir.roprocessor Systems with D~stributed Data
Processing . . . . . . . . . . . . . . . . . . . . . . 17
~
Chapter 2. Processors, Interaction of Processors . . . . . , . . . 22
2.1. Processors . . . . . . . . . . . . . . . . . . . . . . 22
2.2. Interaction of Processors . . . . . . . . . . . . . . . 27
Chapter 3. Parallel Data Processing . . . . . . . . . . . . . . . . 35
3.1. Parallelism in Problems and Its Evaluation 35
3.2. Paralleling the Computation of Arithmetic Expressions . 39
3.3. Computation of Recurrent Relationsfiips . . . . . . . . . 40
3.4. Computation of Exponents and Polynomials . . . . . . . . 41 _
3.5. Paralleling Cycles in Programs . . . . . . . . . . . . . 42
3.5. Conflicts in Access to Memory . . . . . . . . . . . . . 43
3.7. Parallel Algorithms . . . . . . . . . . . . . . . . . . 44
23 -
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Fage
Chapter 4. Structure of Connections. Methods of Switching. 47
Control. . . . . . . . . . . . . . . . . . . . . . _
4.1. Data Transmission Lines . . . . � � � � � � � � ' ' ' ' 4~
' ' 51
4.2. Structure of Connections . . . . . . . . . � � � ~ � � � ~ �
4.3. Switching, Control . . . . . . . . . � ~ � � � � � � ' ' ' '
~ 67
Chapter 5. Exchange Systems with a Standard Bus Structure
Chapter 6. Decentralized Priority Control of Data Exchange. 88
Decentralized Code Control . . . . . . . . � � ~ �
(;hapter 7. The Organization of Decentralized Priority Control 101 -
for Systems with 5imple Subscribers . . . . . . .
110
Chapter 8. Algorithms for Local Control of Data Exchange
. . . . . . 126
Chapter 9. Computations in a Common Channel . . . � � � � ' . , . , 126
9.1. Interaction of Three Subscribers . . . � � � � � � � 128
9,2, Interaction of a Random Number of Subscribers 135
9.3. Technical Support of Semaphores . . . . . � � � � � � � � � ,
9.4. The Use of Associative Memory Devices for Computations 136
- in a Common Chantiel . . . � � � � � � � � � ` ' ' ' ' '
9.5. Selection of Program and Interrupt eo~ands, Expanding 138
the Command Functions of the Computer . . . . . . . . . .
143
Chapter 10. Protection (Security) of Data Processing . � � � � ' ' ~ ~ ~ 144
10.1. The Cryptographic Approach To Data Security
I0.2. Cryptosystems with a Public Key (Public-Key Systems). 147
Methods of Obtaining a Digital Signature 148
10.3. Security of Programs and Data in the Computer
Chapter 11. Multimicroprocessor Locally Distributed and Concentrated
_ Control-Co~nputing System (Txamples of Realization 157
and Application) . . . � � ~ � � � � � � ' ' � ' '
11.1. The Role of Microprocessor Systems in Complex Control- . , 165
Computing Systems . � � � � � � ' ' ' ' '
- 11.2. Decentralized M~t~roprocessor�Control-Computing Systems 167
with Distributed Control and Their Application
11.3. The Architecture (Structural Organization) of Multi- 175
microprocessor Concentrated Computing Systems . � � � �
11.4. Survey of Highly Productive Multimicroprocessor 183
Computing Systems . . . . . . . . . . � � � � � � � � �
11.4.1. The PROPAL-2 Parallel and Associative Multi-
Microprocessor System of the French Compa.ny lg3
Thomson-CSF . . . � � ~ � � � � ' ' ' ' '
11.4.2. The ICL 64 X 64 Distributed Matrix�Processor 197
11.4.3. The Siemens AG SMS 201 Structurized Multi- i99
- microprocessor System . � � � � ' ' ' ' ~ 201
11.4.4. The Wisconsin Parallel Array Computer
11.4.5. A Specialized MulCimicroprocessor System for ~05
Processing Reflected Radar Signals . . . . . . .
24 ~
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Page
11.4.6. The POPSY and HUPERCUBE Systems 206
11.4.7. The Point System AP-120B and Data
General AP-130 Array Processors (United
States) . . . . . . . . . . . . . . . . . 2Q8
11.4.8. Cm* Multimicroprocessor Sqstem . . . . . . . . 215
11.4.9. A Multimicroprocessor Computing System with
Circular Structure . . . . . . . . . . . . . 218
Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 221
Bibliography . . . . . . . . . . . . . . . . . . . . . . . . . . . . 226
Glossary of Abbreviations . . . . . . . . . . . . . . . . . . . . . . 235
COPYRIGHT: Izdatel`stvo '~Nauka", 1980 _
[112-11,176]
11,176
CSO: 1863
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INSURING SECURITY OF MICROPROCESSOR DATA PROCESSING SYSTEMS
Moscow MIKROPROTESSORNYYE SISTEMY in Russian 1980 (signed to press 26 Jun
80) pp 143-154, 226, 232-233
[Chapter 10 from book "Micr�oprucessor Systems", by lveri Varlamovich
Prangishvili and Gennadiy Georgiyevich Stetsyura, Izcatel~stvo "Nauka", 9,750
copies, 240 pages] ~
[Excerpts] Chapter 10. Protection (Security) of Data Processing
Data processing security is important tn microprocessor systems chiefly for
distributed systems hecause of the great dispersion of data storage and
_ processing means, the possibility of human intervention at many points in
the system, and the existence of common cornmunications lines. _
Data processing security comprises the security of the information stored
and being processe d in the computer (including programs) and the informa-
tion being transmitted by communications lines tietween data sources,
processing devices, and receivers. The topic also encompasses confirmation
- of the individ~ial subscriber.
We will ciL�e examples of distributed microprocessor systems that need data
processing security.
- 1. The information reference system. The system should provide security
of information against unauthorized reading and alteration. Information
being transmitted to a user terminal should not be acceptable to a third
party.
2. The automated control system. Because perfectly adjusted systeias do not
exist for practical purposes, programs and data must have mutual security
against distortions and provide monitoring of the work of control personnel.
The system should be confident that the control order comes from a person
who has authority to issue it. The system should also display, at any
moment, convincing proof that it has received an order from precisely this
party.
The situations considered in the examples do not necessarily presuppose �
an illicit intention. Unauthorized access may occur because of equipment _
malfunction; a terminal connected to the common line may incorrectly decode .
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an address and print out the wrong document. The signature under the docu-
ment is generally a co~only accepted norm. Until recently, however, there
were no means of creating a reliable "eleetronic signature" which could be
transmitted in digital form within the system.
At the same time, as numerous publications show, the illicit intention can-
not be ignored either. Thus, if key-type security that is adequate in -
ordinary conditions is used, it must be rememliered that tfiere may be at- _
tempts to decipher the key. An attempt may be made to forge a signature, -
and a~hird party achieving communication with the computer may attempt to
take information out of the machine, intercepting it for himself.
Below we will briefly describe the principal methods of data security.
= 10.1. The Cryptographic Approach To Data Security
- The cryptographic method of data security described below was developed at
IBM and formed the basis for the standard adopted by the U. S. National
Bureau of Standards [10-1-6J. It was based on C. Sfiannon's work on cryptog-
raphy published in 1949 [10-2]. We will consider two types of convertors. -
In Figure 10.1 below block P performs rearrangements. Each of its inputs
is connected electrically with ~ust one output (Figure 10.1 does not show
all the connections). Block S performs substitutions. The decoder converts
~
a
6~oaP
(c)
~ , ~ ~ , ~ , -
6
Q ~ ru u~ p a m n p f~ X 16 (d~ Key : (a) Rearrangement P;
(b) Substitution S;
p !s (c) Block R;
(d) 4 x 16 Decoder;
U (e) Block S;
(f) 16 x 4 Coder.
6nu~r S
� (e)
, 0 /S
~ u~ p a m o p /6XS~ (f)
~
Figure 10.1. Code Convertars _
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the binary code to an output signal at its output. The outputs of the de-
coder (points k) are connected with the inputs of the coder on the basis of
a certain reordering. The coder forms the tiinary code again at the output.
- For example, the code 0011 at input S(Figure 10.1) is converted to code 1111
at the output. ~ao mutually reversible rearrangement connections can be es-
tablished between the decoder and the coder and the binary control signal U
selects one of them. The cryptographic system is structured from absolutely
identical connections between blocks P and S(see Figure 10.2 below). Vec-
tor U is a key which sets one of two connections in each of the modules of
S depending on the corresponding bit position of U. (For the sake of sim-
plicity most of the connections between blocks P and S have been oznitted
from Figure 10.2). The strong relationship between bit positions is a dis-
tinguishing feature of this kind of connection. Figure 10.2 shows signal 1
fed to the only input of the circuit is converted into seven units at the
output. Therefore, a slight error at the input substantially distorts the
~ output. Changing key U completely alters the behavior of the circuit. Tn
principle, block S taken separately is a good cryptographic device if it
is large in size. However, it is practically impossible to nake such a
block.
� P
U S S S S
P
S' S S S
P
S S S S
P
S S .S S _
P
Figure 10.2. Sequential Connection of Blocks P and S
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Indeed, if we take S as having five inputs, the number of points k in it is
25 = 32 and the number of possible interconnections is 32! Tfiis is a fairly
large number. However, such a cipher is easily subjected to frequency
analysis because the five inputs are precisely what is necessary to encode
one letter of the alphabet. Therefore, frequency analysts of the coded
text easily identifies the unknown correspondences of letters at the input
and output of block S. The list of possible input and output characters
here is very small (32) and it can be studied easily.
But if the number of inputs~ is taken to be much larger~ for example 128,
the number of possible "characters" is 2128, whicfi is too large for
_ analysis. But a block S with 128 inputs must have 2128 points k(see
Figure 10.2); that is, it cannot be built. Blocks P are not suitable for
constructing a decoder (although they are simpler to perform for a large
number of inputs); by feeding one unit to the input it is possible to de-
termine i~nediately the output corresponding to it.
With the structure shown in Figure 10.2 it is possible to obtain good se-
curity with relatively low complexity because although the blocks S here -
are small, their outputs go to block P, which performs a rearrangement
. within the limits of a much larger bit format. The result is a structure
whose internal organization is very difficult to decode. If U contains
128 bit positions, it will be necessary to sort through 2128 combinations
_ of states of block S for decoding.
If the working speed is not critical, a m~iltilayered scheme (see Figure
10.2) can be made by int~oducing feedback to one layer. The message can
, be decoded by passing it through a similarly organized circuit in which
- the blocks perform the inverse conversion (see Table 10.3 below).
Hnroy (b)
~ ~6aNeNm �6oHeNms -
_ K~ � iS',q_~ ~aun
Nnroveu~~ ~
( FOa- A'nrov
i C) e Ce ab Cle~ ~ a m~~'
~ F~~ io ~o F�i ~F a e
~y ~a ~5~
y.aa7?i ~~~8,~ ~`~v, k y, ~C6t~i c.z~e qa )
GBNCN!!A
`
~ 1~ /l~,veaQmvu~r ~ 2~/Ipue,y~uK
Table 10.3. .Cryptographic System
Key: (1) Transmitter: (f) Error Correction Coder; -
(2) Receiver; (g) Error Correction Decoder;
(a) Subscriber; (h) Gates;
(b) Subscriber Key; (i) Comparison Circuit;
_ (c) Data; (j) Key File [left hand column -
(d) Clock; "Subscriber"; right hand
(e) Cryptographic System; column "Key"].
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Let us demonstrate how this procedure can be used to establish the authen-
ticity of a sour ce using the example of the work of the system shown in
Figure 10.3. The connection between the source and the receiver is ac-
complished by the following scheme.
Subscriber A communicates his name to the receiver in open code. Receiver A
finds the decod ing key Ka_1 corresponding to this subscriber and enters it
in its cryptographic system. Subscriber A sets his own key Ka in the trans-
mitter cryptographic system. The receiver and transmitter have muCually
synchronized clo cks. The clock readings must be identical. The encoded
message is very sensitive to interference, so an error correction system
is installed at the output of the transmitter and the input of the receiver.
After. receiving auChorization from the receiver, subscriber A begins trans-
mitting informa ti~n. The information arrives in blocks on the upper half
of the inputs of the cryptographic system. Clock readings arrive in the
lower half. Af ter decoding the message the receiver compares the counter
reading received with its own readings and, if they coincide, accepts the
block ~f data th at has arrived.
In such a system the receiver and transmitter may establish the authen-
ticity of the o ther party because it is difficult to forge the keys.
Moreover, it is impossible to use a correct but improper text to create
interference. For example, it is not possible to make a tape recording of
improper information and use it later to falsely trigger the system. Be-
cause transmiss ion of the recording will be done later than transmission
of the original, the clock readings of t~ie tiransmitter and receiver will -
not coincide and the messane will not be accepted. In this case the clock
reading plays the role of a password. In th~s system, however~ tbe re- _
ceiver can forge transmitter messages. Therefore, such a"document" has
no legal force.
10.2. Cryptosystems with a Public Key (Public-Key Systems). -
Methods of Obtaining a Digital Signature
The method of using a key to protect information requires that the keys be
~ delivered to subscribers by a safe channel (for example by messenger). This
is a slow procedure and not suitable for situations where an unforeseen con-
nection must b e established, because there will be no key for this situa-
tion, The ques tion naturally arises: is it impossible to transmit the
key on an open channel? The classical answer until recently was that it was
not possible. In 1976, however, the opposite answer was given to this
question [10-7-9].
In cryptographic system with a generally accessible key, coding and de- _
coding are con trolled by different keys E and D which are such that it is
practically impossible to compute D on the tiasis of E(for example, it re-
quires performing 10100 operations). The key Ei of subscriber Ai is _
stored in a general-access reference. Practiaally no one except Ai will be
able to decode the encoded message.
To be more pre cise, E and D should have the following propertiest
1) D(~(M)) = M, where M is a random message from the set of permissible
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- messages {M}; (2) E(M) and D(M) are easily computable; (3) knowing E
doea not in practice permit computing D; (4) E(D(M)) = M.
The fourth property is necessary only to receive a digital signature
(see below)
To transmit message M to receiver Ai, source A~ takes the coding key Ei
of subscriber Ai from the reference and encodes the message using it:
N-~ Ei(M). Because of property (3) no one except Ai can decode EiM.
. Therefore, Ai performs the operation Di(Ei(M)) = M, that is, decodes the
message (property (1)). Because of property (2) the source and the
receiver must perform fairly simple computations to process the message.
- Finding good keys E and D is a problem [10-9-15].
Now let us turn to the question of the digital signature. This problem
- differs from establishing authenticity where it is sufficient for the
receiver to ascertain that the message to him is, in fact, coming from
the particular source. The signature must have legal force, and it must
be inseparable from the particular document. The procedure for sub-
scriber Aj to receive the signature of subscriber Ai is given below.
1. Ai puts signature S on document M: S= Di(M), where
= Di is conversion of the decoding of subscriber Ai;
2. Ai encodes S with generally accessible key E~ of sub-
scriber A3 and sends E~ (S) to A~;
3. Aj receives S from E~(S), that is, D~(E3(S)) = S;
4. Aj, using generally accessible key Ei, receives M
from S, that is, M= Ei(S) (propexty (4) was used).
Thus, the pair (M, S) is a document with signature and the equality
Ei(S) = M serves as proof of the receipt of M from Ai.
Subscriber A~ cannot forge the document (M } M') because to do so it is
necessary to obtain signature S' = Di(M'), and this is not possible for
A~ .
The digital signal can become very widely used. For example, when
specialized integrated circuits that perform the conversions E and D
quite well are produced it is possible to document telephone orders,
giving each spoken word a signature.
10.3. Security of Programs and Data in the Computer
The methods of coding reviewed in the preceding section insure preserva-
- tion of data during its transmission outside the data processing system.
T.he techniq~res are also an important element of intrasystem security,
but they alone are not adequate because the object stored in the computer
may have fairly complex organization and enter into complex interrelation-
ships. The orgaclization of security ti~at is adequa.te to these structures
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should be worked out accordingly. When it is necessary to gusrd the sys-
tem against accidental malfunctians �airly simple protection circtiits
are usually used. But these circuits cannot prevent the dangerous dissemi-
nation of errors in the system. Moreover, poor protection usually pro-
_ vides little or no record of the events, which makes it more difficult to
detect and eliminate the cauae of Che error. Deliberate interference is
potentially possible in collective-access systems and the lack of protec-
tion against it undermines faith in the system. Below we describe
procedures for protectic~n against random and deliberate interference. The
survey work [10-lOJ contains an extended bibliography on this question.
= It should be noted first that it is practically impossible to add means
- of protection later to systems that do not contain them. Therefore, pro-
tection (if it is considered essential) should be introduced in the early
_ phases of designing the system.
There ~re three types of disruptions that a security (protection) system
should control: unauthorized reading of information; unauthorized modi-
fication of information; unauthorized obstruction of access to informa-
~ tion (in particular, program distortion).
The security mechanism depends significantly on the functional capabilities
of the system. The "all or nothing" principle is often followed. This is
where usera are mutually isolated, but have access to common information.
If a user is authorized to make entries in common information, these
entries become generally accessible. Self-virtualizing machines are a
typica? example (see below).
In a more complex example it may be necessary to protect highly diverse
ob~ects (data and program structures) which are interconnected. The need
for dynamic change in authorizations introduces significant complexities.
In addition to indicating who can do what with tfie object, more subtle
limitations that take into account the properties of the object may be en-
countered. For example, "Access is avthorized only during the working days
of the week from 0930 to 1815."
The following principles are noted in the literature for constructing a
security system.
1. The mechanism of protection must be simple~ c~mpact, and easily sur-
veyed. Otherwise it will be difficult to guarantee its effectiveness.
2. Authorizations should prevail over inhibitions. The normal regime
is lack of access. With this approach it is easier to detect errors than
in systems that are based on inhibitions.
3. Protection should not be constructed on the basis of secrecy of the
protective mechanism; this is difficult to insure. A very small part of
- the information should be secret.
4. A minimum range of authorization necessary to execute its work should
be established for every program. This reduces the damage done by dis-
ruptions and simplifies the search for a disruption.
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- 5. Each protection mechanism should depend minimally on the other mechan-
- iam (see also point 1 above).
6. The monitoring of disruptions should be all-encompassing, covering all
parts of the system in any state.
7. It is desirable to have a record of attempted disruptions.
- 8. It is desirable to decentralize protection; centralized storage of Che
information that controls accesa cannot be relied upon.
The simplest form of protection is complete isolation of users. Let us con- _
sider this kind of protection uaing the example of self-virtuali.zing
machines, a variation of virtual machinea [10-11-13, 10-16~. With re-
~ spect to sof tware realization, a self-virtualizing machine requires at
least one additional level of control compared to conventional operating =
systems: a monitor of control of system resources. User ~obs are performed
under the control of the operating systems tfiey aelect, but the systems are
executed in the job regime. When they must organize access to some physi- -
cal resource, they refer to the control of system resources, and only it
in fact distributes the resources. Because in the particular case oper-
ating systems can serve a small nwnber of users, they are relatively simple
and control of system resources also performs limited functions. One of
- the chief purposes of this organization is to work with programs and oper--
ating systems that have not been debugged and to insure reliability,
safety, and security.
The hardware shoul3 have a built-in data security apparatus in order to
design an eff ective self-virtualizing machiiie. Figure 10.4 below shows
one of the possible diagrams. The system has a rela tive base addressing
mechanism. When one process Ai of the set of proces ses performed by oper- -
ating system OSA is generated, OSA (monitored by the system for control of
system resources) identifies the address of the memo ry docnain II Ai and
formulates the state word of this process. This word indicates the de- -
scriptor that contains the base (B) and the maximum shift (MS). The sign
C2 indicates the permissible work regime in the identified memory domains:
write, read, unlimited. We will describe the sign C1 below. For the
work process Ai, its state word (Ai) should be s~t in control register R.
The command which requires reference to memory contains a positiva shift
relative to the base. During the performance of such a command the shift
is added to the value of the base indicated in the state word (Ai). If
the address for access to memory obtained in this case goes outside the
boundaries of the interval [B, MS], hardware control blocks memory access.
_ A single process may require several state words, and it is wise to have a
group of registers { R} and indicate the necessary register in tfie command -
to avoid having to replace the contents of register R frequently. -
' Sign C1 in the state word uf the process is used to describe the type of
data contained in the memory domain corresponding ~o the given state word
[10-14]. Ssppose C1 = a means that the state word of tt~e process is stored
in a particular domain of the memory unit. We will divide the aet of
- commands (of the user and operating systems) into two subsets: M1, which is
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3y
- .
~