PROPOSED REVISION TO FIPS 71, ENTITLED 'ADVANCED DATA COMMUNICATION CONTROL PROCEDURES'
Document Type:
Collection:
Document Number (FOIA) /ESDN (CREST):
CIA-RDP84-00933R000100010054-3
Release Decision:
RIPPUB
Original Classification:
K
Document Page Count:
9
Document Creation Date:
December 15, 2016
Document Release Date:
November 20, 2003
Sequence Number:
54
Case Number:
Publication Date:
March 24, 1981
Content Type:
MF
File:
Attachment | Size |
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Body:
P1
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ODP-81-383
24 March 1981
i NDUM FOR: Information Handling Systems Architect
Chairman, Agency-wide a
Engineering Standards
OC ADP Control Office
Deputy Director for ng:"
Chief, Engineering Division, CDP
AT FROM
Chief, Management Staff, GDP
SUBJECT : Proposed Revision to FIPS 71, entitled
Advanced Data Communication Control
Procedures"
1. Pevisions to Federal Information Processing Standard 71,
entitled "Advanced Data Communication Control Procedures," are
being proposed to make FIPS 71 more clearly consistent with the
revised Federal Standard 1003 being processed by the General
Services Administration and the National Communications System.
A copy of the proposed revisions to FIPS 71 is attached. (PIPS
71 is available for review in the ODP Management Staff, Room
2D0109, Feadquarters; FIRS 78, Guideline for Implementing
Advanced Data Communication Control Procedures, referenced in the
attached is unfortunately not available at this time.)
2. we ask that you provide comments on the revision by
1 June 19F,1. Comments on any requirements not provided for in
this proposed revised standard would be most helpful. Please
S TAT also comment on the cost impact as well as any benefits that you
anticipate will result from the implementation of this proposed
revised standard. If you have any questions, please contact
SAT of my staff
ILLEGIB
ILLEGI
ST
Attachments: a
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STAT Approved For Release 2004/05/05 : CIA-RDP84-00933R000100010054-3
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Proposed Revision- to FIPS PUB 71
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It is proposed that the specifications section of FIPS PUB 71,
Advanced Data Communication Control Procedures, be revised to add
the following two new items:
(4) All systems shall implement the 16-bit frame check
sequence (FCS) specified in American National Standard
X3.66-1979, referenced above.
A 32-bit FCS may also be provided for use when it has
been determined that a higher degree of error protection
is necessary on a link. For a discussion of the
relative merits of the 16-bit and 32-bit FCS, see FIPS
.PUB 78, Guideline for Implementing Advanced Data
Communication Control Procedures, Section 7.8.
The equations for 32-bit FCS generation are:
X32G (X) k + X'?"L (X) = Q (X) + R (X)
P (X) P (X)
FCS = L (X) + R (X) = R (X)
The arithmetic is modulo 2.
L(X) = X31+X30+X29+X28+X27+X26+X25+x24+X23+X22
+X21+X20+X19-L.X18+X17+X16+x15+Xl4+X13+X12+Xll+X10
+X9+X8+X7+X6+X5+X4+X3+X2+X1+1.
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R(X) = The remainder which is of degree less than 32.
k = The number of bits represented by G(X).
P(X) = The generator polynomial X32+X26+X23
+X22+X15+X12+X11+X10+X8+X7+X5+X4+X2+X1+1
G(X) = The message polynomial, which includes the
contents of the address, control, and information
fields, excluding the zero bits inserted for
transparency (see American National Standard X3.66-:1979,
Section 3.7).
The generation of the remainder R(X) differs from that
used in conventional (non-ADCCP) check sequence
generation by the presence of the Xk L(X) term in the
generation equation. When the 32-bit FCS generation is
by the usual shift register technique, the Xk L(X)
term is added in either of two :rays:
a. Preset the shift register to all ones rather than to
all zeros as in conventional (non-ADCCP) generation
procedures. Otherwise, shift the data G(X) through
the register as in conventional procedures, or,
b. Invert the first 32 bits of G(X) before shifting
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into the register and shift the remaining part of
G(X) through the register uninverted. This requires
that G(X) contain at least 32 bits.
Whether 1 or 2 is used, the shift register contents,
after shifting through G (X) , are R (X) . These contents
are inverted bit-by-bit and transmitted as the FCS
sequence.
The transmitted sequence is always (in algebraic
notation) : M(X) = X32 G(X) + FCS.
The received sequence will be denoted M*(X) and may
differ from the transmitted sequence M(.X) if
transmission errors are introduced. The checking
process always involves dividing the received sequence
by P(X) and testing the remainder. ' Direct division,
however, does- not yield a unique remainder and it is
expected that in most cases the received sequence will
be modified for checking purposes by the addition of
terms which will cause the division to yield such a
unique remainder when M*(X) = M(X), i.e., when the frame
is error free.
ITwo classes of checking equations are given below:
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XY[M* (X) + XkL (X)] = Q (X) + R (X)
P (X) P (X)
(Equation 1)
In this case, the unique remainder is the remainder of
the division XY LM
PM
When Y = 0 the remainder is L(X) (32 ones).
When Y = 32 the remainder is X31+X30+X26+X25+X24
+X18+X15+X14+X12+X11+X10+X8+X6+X5+X4+X3+Xl+l.
XY[M* (X) k + (X + 1) L (X)] = Q (X) + R X (Equation 2)
P(X) PM
In this case, the unique remainder is always zero
regardless of the value of Y.
Shift register implementation of the above equations
normally use Y= 32 (pre-multiplication). When this is
the case, the added term XkL(X) in Equations 1 and 2
is added by either inverting the first 32 received bits
of M*(X) before shifting them through the checking
register or by presetting the register to all ones and
shifting all of M*(X) through normally. Thus, the
receiver action on the leading portion of a frame is the
same with either Equation 1 or 2.
The +1 of the term (Xk+l) L (X) of Equation 2- is added
by inverting the 32-bit 'FCS. This implies a 32-bit
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storage delay by the 32-bit FCS function at the receiver
since the location of the 32-bit FCS is not known until
the closing flag is received.
(5) To maximize interoperability among -major' Federal data
communication networks, while still allowing flexibility
to tailor a network for efficient day-to-day use, the
following features are required:
a. The W bit in the, frame reject (FRMR) information
field shall be set to indicate the cause of the
frame rejection condition. (See American National
Standard X3.66-1979, Section 7.5.3.1.)
b. Upon receiving a FRMR with the W bit set to Qne, a
pr.imary/combined station shall issue an appropriate
mode setting command (i.e., SNRM, SARM, SABM, SNRME,
SARME, or SABME) and shall not subsequently, during
the same connection with the same secondary/combined
station, transmit a frame containing the command or
response that caused the frame rejection condition.
(See American National Standard X3.66-1979, Section
7.4.1.)
It is also proposed that the cross-index section of FIPS
PUB 71 be revised--to-add-the following new items:
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(c) FIPS PUB 78, Guideline for Implementing Advanced
Data Communication Control Procedures.
(d) International Standard 3309: Data Communications -
High-level Data Link Control Procedures - Frame
Structure.
(e) International Standard 4335: Data Communications -
High-level DataLink Control Procedures - Elements
(f) Addendum 1 to International Standard 4335: Data
Communications - High-level Data Link Control
(g)
Procedures - Elements of Procedures.
Addendum 2 to International Standard 4335: Data
Communications - High-level Data Link Control
Procedures - Elements of Procedures.
(h) International Standard 6159: Data Communications
High-level Data Link Control Procedures
(i) International Standard 6256: Data Communications -
High-level Data Link Control Procedures - Balanced
Class of Procedure.
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(j) CCITT Recommendation X.25: Interface Between Data
Terminal Equipment (DTE) and Data.
Circuit-Terminating Equipment (DCE) for Terminals
Operating in the Packet Mode on Public Data
Networks.
(k) CCITT Recommendation X.75: Terminal and Transit
Call Procedures and Data Transfer Systems on
International Circuits Between Packet-Switched Data
Networks.
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