JPRS ID: 9915 USSR REPORT CYBERNETICS, COMPUTERS AND AUTOMATION TECHNOLOGY EXCERPTS FROM THE JOURNAL "HANDBOOK ON INEGRATED MICROCIRCUITS' ED. BY B.V. TARABRIN

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JPRS L/9915
- 17 August 1981 ~
IJS~R~ Re ~rt
p
- CYBERNETICS, COIVIPUTERS At~~J ~
AI~TOMATION TECHNOLOGY
(FOUO 18/81)
Excerpts from 'HANDBOOK ON INTEGRATED MI~CROCIRCUITS'
Ed. by
B.V. Tarabrin
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FOR OPFICIAL USE UNLY
JPRS L/9915
17 August 1981
USSR REPORT
~YBERNETICS, COMPUTERS AN~D AUTOMATION TECHNOLOGY
(FOUO 18/81)
EXCERPTS FROM 'HANDBOOK ON TI~TEGitATED MICROCIRCUITS'
Moscow SPRAVOCHNIK PO INTEGRAL'NYM MIKROSKHEMAM in Russian 1980 (signed
- to press 22 Feb 80) pp 2-41, 564-816
[Ann~tation, table of contents, foreword to second edition, parts 1 and
- 5, and appendices fram book "Handbook on Integrated Microcircuits,"
edited by B.V. Tarabrin, Izdatel'stvo "Energiya," second edition
revised and enlarged, 100,000 copies, 816 pages, UDC 621.3.049.77(03)]
CONTENTS
Annotation 1
Table of Contents 1
Foreword to Second Edition 4
Part One. General Information on Integrated Microcircuits 7
Part Five. Application of Integrated Microcircuits 34
Appendix 1. Graphical Identification Codes for Logical Elements 236
Appendix 2. Conversion Table for the Identification Codes of
?~Iicrocircuits Described in This Handbook 245
Appendix 3. Index of Types of Microcircuits Described in This Handbook 258
- a- [III - USS~ - 21.C S&T FOUO]
~
.-~n ~rr. ~ T 7 tc+~ l~1U1 V
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UDC 621.3.049.77(03)
HANDBOOK ON INTEGRATED MICROCIRCUITS
Moscow SPRAVOCHNZK PO INTEGRAL'NYM MIKROSKHEMAM in Russian 1980 (signed to press
22 Feb 80) pp 2-41, 564-816
[Annotation, table of contents, foreword to second edition, parts 1 and 5, and
appendices f rom book "Handbook on Integrated Microcircuits", edited by
B. V. Tarabrin, Izdatel'stvo "Energiya", second edition revised and enlarged,
100,000 copies, 816 pages]
[Text] This handbook presents information on digital and analog integrated mi-
crocircuits. Soviet-made integrated microcircuits are classified. Types of
housings and their general characteristics and parameters are described. De-
~ tailed information is pr~vided on each series of integrated microcircuits: the
basic purpose of each series, the basic electric circuits, base ~esign, and
electric parameters. The first edition was published in 1977.
This handbook is intended for engineers and technicians involved in the develop-
ment, use, and repair of electronic equipment.
Contents Page
Foreword to Second Edition . . . . . . . . . . . . . . . . . . . . . . . . . 7
Part One
General Informati~n on Integrated Microcircuits
1-1. Terminology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
1-2. Structural-Technological Types of Integrated Microcircuits 10
Technology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Housings . . . . . . . . . . . . . . . . . . . . . . . . o . . . . 11
1-3. Classification of Integrated Microcircuits on the Basis of
Functional Purpose, and Type Designation . . . . . . . . . . . 23
1-4. Integrated Microcircuit Operating Conditions . . . . . . . . . . . . . 28
1-5. Electric Parameters of Integrated Microcircuits . . . . . . . . , . . 35
Parameters Measured in Units of Voltage . . . . . . . . . . . . . . . 35
Parameters Measured in Units of Current . . . . . . . . . . . . . . . 37
Parameters Measured in Units af Qower . . . . . . . . . . . . . . . . 38
Parameters Measured in Units n~f Frequency . . . . . . . . . . . . . . 38
Parameters Measured in Units of Time . . . . . . . . . . . . . 3g
Relative Parameters . . . . . . . . . . . . . . . . . . . . . . . . . 39
Other Parameters . . . ~ , , , , , , , , , , , , , , , , , , , , , , , 40
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Part ~vo
Reference Information on Diqital Inteqrated Microcircuits
Series K108 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Series 109 and K109 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Series 114 and K114 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 ~
Series 115 and K115 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Series 121 and K121 . . . . . . . . . . . . . . . . . . . a . . . . . . . . . 58
Series 128 and K128 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Series 130 and K130 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
Series K131 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
Series 133 and K133 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
Series 134 and K134 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
Series 136 and K13b . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
Series K137 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106
~ Series K138 . . . . . . . . . . . . . . . . . . . . . a . . . . . . . . . . . 114
Series K141 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119
Series K144 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122
Series 155, K155, KM155 . . . . . . . . . . . . . . . . . . . . . . . . . . . 124
Series 156 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 186
Series Y.158 . . . . . . . . . . . . . . . . . . . . . . . . . . . ~ . . . . . I92
Series K166 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 196
Series K172 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 197
Series K176 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 199
Series 178 and K178 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 212
Series 185 and K185 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 215
Series K187 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 219
Series K188 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 223
Series 201 and K201 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 227
Series 202 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 232
Series 204 and K204 . . . . . . . . . . . . . . . . . . . . . e . . . . . . . 236
Series 205 . . . . . . , . . . . . . . . . . . . . . . . . . . . 241
Series 210 and K210 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 243
Series 211 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 244
Serizs 215 . . . . . . . . . . . . . . . . � . . . . . . . . . . . . . . . . 251
Se.ries 217 and K217 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 254
Series 218 and K218 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 261
Series 221 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 264
Series 223 and K223 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 268
. Series 229 and K229 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 273
Seri.es 230 and K230 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 277
- Series 231 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 285
Series 240 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 267
Series 243 and K243 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 296
Series 263 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 305
_ Series K500 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 308
Series K511 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 329
- Part Three
Reference Information on Analog Integrated Microcircuits
Series 101 and K101 . . . . . . . . . . . . . . . . . . . . . . . . . . . 346
Series K118 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 347
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Series 119 and K119 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 351
Series 123 and K123 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 362
Series 124 and K124 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 363
Series 129 and K129 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 364
Series 140, K140, KP140 . . . . . . . . . . . . . . . . . . . . . . . . . . 365
Series K142 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 375
Series K148 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 377
Series 149 and K149 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 379
Series 153 and K153 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 380
Series 159 and K159 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 385
Series 162 and K162 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 386
Series K167 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 387
Series 168 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 387
Series K170 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 389
Series K174 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 394
Series 175 and K175 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 405
Series 177 and K177 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 408
Series 190 and K190 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 410
Series 198 and K198 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 412
Series 218 and K218 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 415
Series 219 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 421
Series K224 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 430
Series 226 and K226 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 444
Series 228 and K228 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 447
Series 235 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 452
Series K237 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 464
Series K252 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 472
Series K264 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 481
Series 26S and K265 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 483
Series 272 and K272 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 489
Series 284 and K28~ . . . . . . . . . . . . . . . . . . . . . . . . . . . . 492
Sexies 301 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 498
Series 504 and K504 . . . . . . . . . . . . . . . . . . . . . . . . . . . 507
Part Four
Methods for Measuring the Electric Pnrameters of In~egrated Microcircuits
- 4-1. Specific Features of Measuring Micrxircuit Pa?ratt~eters 509
4-2. Measuring the Parameters of Digital Integr~ted Mierocircuits 511
General Premises . . . . . . . . . . . . . . . . . . . . . . . . . . 511
Measuring Parameters Given in Unita of Voltag~ . . . , . . . . . . . 512
Measuring Paraa~ters Given in Units of Current . . . . . . . . . . . 516
Measuring Dynamic Parameters Representing Switch~-On D~elays,
Propagation Delays Following Switch-on, and Propagation Delays
Following Switch-Off . . . . . . . . . . . . . . . . . . . . . . . . 521
4-3. Methods for Measuring the Electric Para~areters ot Analoq Integrated
Microcircuits . . . . . . . . . . . . . . . . . . . . . . . . . . . 522
General Premises . . . . . . . . . . . . . . . . . . . . . . . . . . 522
Measuring Parameters Given in Units of Voltage . . . . . . . . . . . 524
Measuring Parameters Given in Units of Current . . . . . . . . . . . 533
Measuring Parameters Given in Unita of Pbwnr . . . . . . . . . . . . 538
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- Meas~lring Parameters Given in Units of Frequency . . . . . . . . . . 539
Measuring Parameters Given in Units of T.ime . . . . . . . . . . . . 54?
Measuring Relative Parameters . . . . . . . . . . . . . . . . . . . 543
Measuring Parameters Given in Units of Resistance 556
Measuring Other Electric Parameters . . . . . . . . . . . . . . . . 561
Determination of Characteristics . . . . . . . . . . . . . . . . . . 563 �
4-4. Determinatiqn of the Interference Resistance of Integrated
Microcircuits . . . . . . . . . . . . . . . . . . . . . . . . . . . 563
Part Five
Integrated Microcircuit Applications
- 5-1. Recommendations on Assembling Integrated Microcircuits 564
5-2. Examples of Building Functional Electronic Units Based
on Digital Microcircuits . . . . . . . . . o . . . . . . . . . . . . 568
Series K50~ Microcircuits . . . . . . . . . . . . . . . . . . . . . 568
Series K511 Microcircuits . . . . . . . . . . . . . . . . . . . . . 600
Series K176 Microcircuits . . . . . . . . . . . . . . . . . . . . . 637
- Series K131, K155, K158 Microcircuits . . . . . . . . . . . . . . . 653
5-3. Examples of Building Functional Electronic Units Based on
Analog Microcircuits . . . . . . . . . . . . . . . . . . . . . . . . 758
Appendix 1. Graphical Identification Codes for Logical Elements 771
Appendix 2. Conversion Table for the Identification Codes of
Microcircuits Described in This Handbook . . . . . . . . . . . . . . . . 781
Appendix 3. Index of Types of Microcircuits Described in This Handbook . 795
Foreword to Second Edition
The period since the time of preparation and publication of the first edition of
the "Handbook of Integrated ~Iicrocircuits" has been typified by swift introduc-
tion of integrated microcircuits into general-purpose and control computer com-
plexes; into peripheral equipment; into the data recording and transmission de-
~ vices of automatic production process control systems; into instruments and
equipment intended for scientific research and mechanization of engineering and
control; into medical instruments and household appliances; into agricultural
and environmental control equipment, and so cn.
Broad introduction of integrated microcircuits into the national econo~uy is pro-
mot~d by decisions of the 25th CPSU Congress, which determined that: "Ttie main
task of the lOth Five-Year Plan is to successively implement the Communist Par-
ty's policy of raising tine material and cultural standard of living nf the peo-
ple on the basis of dynamic and proportionate development of social production,
enhancement of its effectiveness, acceleration of scientific-technical progress,
growth of labor productivity, and all-out improvement of the quality of work
done in all units of the national economy."
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Use of integrated microcircuits has made it possible to improve and to create
new methods for planning, designing, and producing electronic equip~nt for var-
ious purposes, to upgrade its technical and operating characteristics, and to
introduce electronics into a number of devices traditionally designed an the ba-
sis of inechanical or electromechanical principles of operation.
But at the same time, the practical experience of tl;~ handbook's authors pro-
vides the grounds for asserting that mistakes are sometimes made in selecting
the nomenclature of integrated microcircuits when designing and producing elec-
tronic apparatus: The conditions of their application are violated; a number of
requirements conc.erning links between integrated microcircuits are not accounted
for, resulting in unstable operation of the electronic equipment.
One of the causes behind these mistakes is an insufficient knowledge of the pa-
rameters and operating features of integrated microcircuits on the part of elec-
tronic equipment developers and manufacturers.
As with the first, the second edition has the goal af acquainting the reader
with integrated microcircuits ~hat have enjoyed the greatest application in dif-
ferent types and classes of electronic equipment (rather ;.h3n the entire nomen-
clature of industrially produced microcircuits), and to provide the reader with
a minimum amount of information on parameter measurements, asse~bly, and design
of electronic subassemblies, and so on.
This handbook is not a replacement for official documents (operational certifi-
cates, specifications, instructions for use), but it c~oes allow the user to re-
view the great assortment of integrated microcircuits being produced by Soviet
_ industry, their parameters, and their operating conditions, to compare them with
the requirements imposed on the equipment, and to correctly select both series-
produced and custom-made microcircuits.
The microcircuit nomenclature of this edition of the handbook is significaztly
different from that of the first edition (1977). In particular the composition
of series TTL and KMOP microcircuits, series-produced operational amplifiers,
and backup electric power supplies have been significantly supplemented as of-
fering ma,jor promise today; microcircuits exhibiting high resistance to inter-
ference and series-produced superhigh-speed microcircuits employing emitter-
, linked logical circuits have been included. Concurrently a number of series-
prod~lced microcircuits enjoying limited use today were dropped from the handbook.
The section describing the applications of different classes o= microcircuits
(TTL, KMOP, ESL, VPL) was expanded, and a reference table of correspondence be-
tween old and new identification codes is provided.
The authors feel that separate editions will have to be published in order to
provide fuller information on this sub3ect, including the behavior of integrated
circuits in response to changes in temperature and load.
The materials presented in this handbook are based on a generalization of expe-
rience in usin~ microcircuits, and on a study of their properties and parameters.
. 5
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The authors hope that this handbook will be useful to engineers and technicians
developing and using electronic equipment based on integrated microcircuits.
The authors request that all comments and suggestions for improvement of the
handbook be sent to the following address: 113114, Moscow, M-114, Shlyuzovaya
nab., 10, izdatel'stvo "Energiya".
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Part One. General Information on Integrated Microcircuits
1-1. Terminology
Microelectronics is the field of electronics encompassin~ the problems of the
investigation, design, manufacture and application of microelectronic products.
' A microelectronic product is an electronic device with a high degree of integra-
tion.
An integrated microcircuit (microcircuit, IC) is an electronic product which
' performs a defined function of signal conversion and processing and has high
packing density of electrically connected elements (or elements and components)
and (or) crystals, which is considered as a unit whole from the point of view of
- te5t, acceptance, delivery and operating requirements.
An integrated circuit element is a part of a microcircuit which performs the
; function of any electronic element and which is executed inseparably from the
crystal or substrate and cannot be isolated as an independent element from the
point of view of the test, acceptance, delivery and operating requirements
(electroni~c elements include traneistors, diodes, resistors, capacitors, and so
on).
- An integrated circuit component is a part of a microcircuit perfoYming the func-
tions of any electronic element which can be isolated as an independent product
from the point of view of test, acceptance, delivery and operating requirements.
A semiconductor integrated microcircuit is a microcircuit, all the elements and
interelement connections of which are executed within and on the surface of a
semiconductor.
A film integrated microcircuit (film microcircuit) is a microcircuit all the
elements and interelement connections of. which are in the form of films (the ver-
sions of film microcircuits include thick-film and thin-film microcircuits).
A hybrid integrated microcircuit (hybrid micr~circuit) is a microcircuit that,
. in addition to the elements, contains components and (or) crystals (the versions
of microcircuits include multicrystalline IC).
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A~.i integrated microcircuit crystal is a part of a semiconductor plate within and
on the surface of ~;~ich the elements of a semiconductor microcircuit, interele-
ment connections and terminal areas are formed.
An analog integrated microcircuit is a microcircuit designed for the conversion
and processing of signals that vary according to a continuous function law [a
special case of an analog IC is a microcircuit with linear characteristic (a
linear microcircuit)].
A digital integrated microcircuit is a microcircuit designed for the conversion
and processing of signals that vary according to a discrete function law (one of
the forms of a digital microcircuit is a logical IC).
The case of an integrated microcircuit is the structural part of the microcir-
cuit designed to protect it from external effects and for connection with exter-
nal electric circuits by terminals.
The scale of integration of an integrated microcircuit is the index of the de-
gree of complexity of the microcircuit characterized by the number of elements
and components contained in it.
The scale of integration of a microcircuit is defined by the formula K= lg N,
where K is a coefficient defining the scale of integration rounded to the near-
est higher whole number; N is the number of elements and companents entering
into the microcircuiti.
A series of integrated microcircuits is a set of types of microcircuits which
can perform different functions, have a unified structural engineering execution
and are designed for ~oint application.
1-2. Structural Engineering Types of Integrated Microcircuits
Technology
Modern microelectronics is developing predominantly along two basic structural
engineering lines--creation of semiconductor integrated microcircuits and cre-
ation of hybrid integrated microcircuits.
Semiconductor Microcircuits. The production of these microcircuits is based on
a planar process permitting simultaneous manufacture of a large number of IC on
a single plate of semiconductor material. This process involves:
planar technology making use of semiconductor material, with elements isolated
by p-n spacing 3unctions;
planar technology making use of semiconductor material, with elements isolated
- by a layer of silicun dioxide;
pl3nar-epitaxial technology, with components isolated by p-n spacing ,junctions;
8
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combined circuit technology, where the active elements (transistors, diodes) are
created in semiconductor material by planar technology, and passive elements
(capacitors, resistors) are created on the surface of the semiconductor material
by the methods of thin-film technology.
Each of these production methods has its advantages for specific semiconductor
microcircuits, buf- planar-epitaxial technology is the most widespread toc~ay.
Hybrid Integrated Microcircuits. These microcircuits are made prinarily by two
basic technological processes:
thick film production by silk screen printing;
thin film production by thertual vacuum deposition, and so on.
Integrated microcircuits manufactured by silk screen printing have come to be
called thick-film circuits, while those manufactured by the methods of vacuum
deposition, ion-plasma spraying, reactive sputtering, and so on are referred to
as thin-film integrated microcircuits.
The applications of samiconductor and hybrid integrated microcircuits have shown
that they do not compete, but mutually complement one another.
Type~ of Cases
According to GOST [All-Union State Standard] 17467-72, integrated microcircuit
cases are divided into four types (Table 1-1).
Table 1-1 .
Type Shape of Case Base Location of Case Terminals Relative to Base
1 Rectangular On base and perpen~icular to it
2 Rectangular Off base and perpendicular to it
3 Round On base and perpendicular to it
4 Rectangular Parallel to plane of base but off it
Cases are classified by standard sizes on the basis of their overall dimensions
and mounting dimensions; a code is assigned to each standard size, consisting of
a number designa~ing tl~ie type of case (1, 2, 3 or 4) and a double-digit number
(from O1 to 99) designating the standard size.
The identification code for a case design consists of the standard size code of
the case, the number of terminals and the version number.
~or exan~pie, a 2U1.14-2 case is a type-2 rertangular case, standard size O1,
with 14 terminals, vcrsion 2.
The overall and mounting dimensions are indicated on drawings (in the IC speci-
fications, handbooks, and certificates) without regard to special elements or
9
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devices used for additional removal of heat from the microcircuit cases, if
~ these devices are not inseparable parts of the cases. Special elements or de-
vices ('~eat transfer devices) and the means of their attachment are indicated in
the technical materials accumpanying specific types of micr~circuits.
~59. 94-9 951.15- 3
Z ~ 4 9 9 6x2,5=95
1 7, N ~ 2,5 3,2 7*1
_ _ - 1 7
E9-~-~ - - 'n
o^
h ~
~ � o o _
- ~ r r
94 '9~4 8 !4 - - 8 - - ~
, 19, S
~951.15-2 1~1.95-5~ �I
6x25=15 ~
2,5 . 4 7t1
.
1 7 ~ 4, 0 1 7 `n
~y 14.~~ 8 ~i
_ ' `"~3 ~ ' ~
~ O
~ ~
r
2~5 ~
_
14 8 ~ 6x2,5=15
19,5 ~ 19,5
955.36-9
~g 3, 6 8
~ ~
o"
g~ ~1p 'L7~ 28 _ ~
~
o
~4~ N
~
h ~
~ ~ N'
- 1~ ~1819~ ~,38
The following terminal spacings have been established for microcircuit cases:
For type 1 and 2 cases, 2.5 mm; type 3, at an angle of 30 or 45�; type 4,
_ 1.25 mm.
10
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;
157. 29 1
0_7 ~~5
~ ~ Switch ~y
~ ~
~T
c�~
~
_ I 29 '
N
I h
N
( B S Z8 25 15
Ir~-~-=r- 32~ ~.I
d9 '
o,s~ 236MP17-1
a
~
9 0
f0
0 o h
c o N ~n
N
~ O O ~V
N 0 ,
h
. G O N
k
O O ~
~ c o
a ,
D,45 ~
4,5 17,8 7,5
+ "Vaga 1B" 8~9
~z . Z~I
- ~ ~ ~o ,
w
~ II
7 k
~ N 7 ~
_ 9 I 'B ~
~ N
20, 5 6
Case terminals can be round or rectangular in shape. As a rule, the diameter of
round terminals is within 0.3-0.5 ~n, while the dimensions of terminal.s having
rectangular cross section lie within a circle 0.4-0.6 mm in diameter.
Integrated microcircuits of some series developed prior to introduction of the
GOST mentioned above are encapsulated in nonstandard cases.
11
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The structural designs o� some types of industrially produced microcircuit cases
and their overall and mounring dimensions are shown on pp 10-17.
~ ~ "Posol" o
~
-
a, ~ 12 ~ ~13 ~ S -
M ,j,
~ MM 11 , w -
-
� ' 3 9 ~ 3,B 8,5
3X3=9
f1,9
238. !Z-1
Z15 6, 8
. o
I I b
R 0,6 s'
o�
+i
l7,5
Z~5 Oy ~
2 termin 1 ~0,5
L3,3
5,8
l2 10 9 B ~
ao
c~o^ � -
~
- 2 ~ y 6
J 3 5 '
2 holes ~ 3.2
- Caseless Microcircuits. A caseless microcircuit is a semiconductor crystal with
elements created within it and on its surface. The crystal is protected by a
lacquer film or by a thin layer of sealing compound. Caseless microcircuits are
connected to wiring boards by flexible wire terminals with a diameter of 40-50 u,
or by rigid terminals having the form of baJ.ls or posts 0.3-0.4 mm in diameter.
The structural design of some caseless microcircuits are presente~ on p 17.
~ 1-3. Classification of Integrated Microcircuits by Functional Purpose, and Type
Designation
A GOST effective in the USSR since July 1974 applies to newly developed and mod-
ified integrated microcircuits, and it establishes their classification and pro-
vides a system of identification codes.
- 12 .
_ , ONLY
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ZJB. !6 1, Z
- h ~ ,
' I I
, I I
25 � ~ 0 0,3
D,5 7, 5
21,5 0_/~~ o
16 9
,
~ , �
a e
20 9-/
~s ~S o,3
~
0
w
~ y
~ ~
o E,S ~ 4, 0, 3
o�
~ 8 termi- 75 O:IS�
~als 0 � 5 Zn
S, J .
2 holes 1.7 A5
9 6 .
m
' ' ~
, ~ 5 �
Switch ig
In accordance with this GOST, microcircuits are subdivided into three groups on
the basis of their structural engineering design; these three groups are desig-
nated as follows:
1; 5; 7--semiconductor;
2; 4; 6; 8--hybrid;
3--other (film, vacuum, ceramic, and so on).
The identification code for the type of integrated microcircuit consists of four
elements.
13
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2U1. !b'-6
~
0
~ y /I I`
_ .I I
~
c 0,3
2, C 1.
V 7,5
0,5 � M
0 : l5 �
16
t
-
Switch
e
/9,5
Zp~.~y-~ For Series K237 IC
1,2
o ~ ~3 ~n
w~ T ~i
n
~ ~
GM
~ Z~5 ~ ~~5 05 , , ,
GX2,5=15 2i 6x2,5a15 Z !S 12,7
1 7
94 8~ oommmmm
'J. `n
b ~
~ oeeo0eo
19 14 19 8
301PL14
a M 301PL14-2
N , f I _.'~`''t_
o-i _ ~ Z'S O,S ~ _
M~ .
6x2,5=15 ~'S 4~-6x2,5=15
14 8 + 19 _
f4 - 8 I
' b ~ _ ~ >1
~
~ ~ f9,5 ~ .
7
The first element--a number indicating the structural engineering design of the
microcircuit (semiconductor, hybrid);
the second element--two numbers designating the serial number of the microcir-
cuit series (from 00 to 99);
14
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the third element--two letters designating the functional purpose of the micro-
circuit, in accordance with Table 1-2;
the fourth element--the serial number of the microcircuit, based on the func-
tional characteristic in the given series.
115.9-1 d01.12-1
22 4,5 ~f9,5
7
' S ~h
N 9 h
~ ~ ~
.0 11 ~
~ ,9 ~
�p 1-. 12 ~f5
0,9 y,8 22
2,5. ' ~'6 0,35 _
Bx2,5=20 2,0 I
i~
a~,. e-~
Switch R~ZS t2Jp.
2 holes ~so
For Series 272 ~y,3'o'6
11 5,9 R45 y
Input N
+27
~
~ ~ 30t0,1S
, ~ ~ - 39
f
Out ~~f ^
u
3 1 8,5 ^
_ 20 8 terminals ~ 10
921.49-9
y8 25,
~ .
i
~N
~
~
RJ1,2 i 24
3,6 1,25 23x1,25 ~~5 S
d6,5
The first two elements designate the number of the microcircuit series. The
first of three numbers in the identification codes of microcircuits developed
15
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- prior to July 1974, is positioned at the beginning of the type designation,
while the second and third numbers are placed after the alphabetic index. A1-
phabetic designations of microcircuit function are shown in Table 1-2. Alpha-
betic designations following the conventions in effect prior to introduction af
the GOST are shown in the far right column of Table 1-2.
3D1.8-2 "Trapetsiya" 4,
5 ~9~5 ~ ~ ~
- o -
o ~ 4,
~ ~
3- - ~ o �
d ~ o ~ - - - -
o e u,
~ 0 142 8 d5
~
0,8 ~S 4,8 20 6x2=12 ~D
16, 7
401.94-1;401.1�-2;401.94-3; 401.14-4 "Tropa" ~
2, 2 15,5 ~ 3 ~
- o~ 8 ~ 6~'1 , �j ~2 ~ 5 -
~ , ~
~o~ 8 ~ ; - M 11 -
~ o
.
a
o
~ o~o^ ; M 9 7 5
0 1u - - 9~3 3x3=9
018 1- - 90
11, 8
~02. rs-i2
N
_ ~
M -
0
b
D~
A b b A
v; 0,7 0, 5 0, 5 0, 7
O -
m
~
c~
~ �j ~
_ ~ ~
N o
JJ p ~ ~ w `
N ~i
~ + ^
a r-I
~ ~ ~
h
N holes
Switct 4 1.2
9,5 /0,5
31
16
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~f29.50-9
- 50 26
~
I
~
N '
I
~
I
3
~o
1 25 3
1,Z5 p,5 '
24x~,25 5
d6, 5
255AMP28-1 "Aktsiya"
. 2~ s s Z�
975�0 9 S 75 0,4 ~ 8
~o
14 ~S ~ 11 a
a
o~~ o h o� ~
0 0 ~ ~ o II
0 6 h ~ O h
o O M p O
0
q o o M ZO .
O O h
, O O N ~
X
O O M
0 0 1,J 143
�U� N ~_J~ 181
o ~--=i
~
2B
6
3
1 ~ ~ o a
M
ti ~ . - [f o a2
~ ' ~ e-
I ~ $O O~
' " ~ ~ ~ p,8
t~-'y
10 t 0,2 6 6~
~4
Q) .
Rectangular case for microcircuits (a) and caseless encapsulation of microcir-
cuits with sealing compound (b).
17
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Many microcircuits described in this handbook were developed prior to introduc-
tion of the GOST, and their functional designations are presented in accordance
with the previous conventions. .
Old and new identification codes represP-~ting the same types of microcircuits
can be encountere3 in the literature and in technical materials today. This
causes some difficulty for engineers and technicians developing and operating
electr.onic equipment employing microcircuits.
Tab le 1-2
Alphabetic Designation
By Conven-
By GOST tion Used
Functions Performed by Integrated Microcircuits 18682-73 Before GOST
Oscillators
Harmonic signals GS GS
Square signalsl GG
Linearly variable signals GL
Specially shaped signals GF GF
Noise GP
Other
Detectors:
Amplitude DA DA
Pulse DI DI
Frequency DS DS
Phase DF DF
Other DP DP
Commutators and switches:
Current KT
Voltage KN
Other KP KP
Transistor switch KT
Diode switch KD
Logical elements:
AND-NOT element LA
OR-NOT element LYe
~ AND element LI LI
OR element � LL LL
NOT elament LN LN
AND-OR element LS LS
AND-NOT element, OR-NOT element LB LB
AND-OR-NOT el~ment LR LR
AND-OR-NOT/AND-OR element LK LK
OR-NOT/OR element LK LK
Expanders LD LP
Other LP LE
18
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Table 1-2 (continued)
Alphabetic Designation
By Conven-
By GQST tion Used
Functions Performed by Integrated Microcircuits 18682-73 B~fore GOST
Modulators:
Amplitude ~ ~
Frequency MS MS
Phase MF MF
Pulse MI MI
Other Mp Mp
Converters:
Frequency PS PS
_ Phase PF PF
Duration pD
Voltage PN PN
Power pi,q
Level (matchers) PU PU
Signal shape pM
Digital-analog PA PD
Analog-digital , PV PK
- Digital-digital pR
Other pp pp
Secondary power supplies:
Rectifiers YeV
Converters YeM
Voltage stabilizers YeN YeN, PP
Current stabilizers ' YeT YeT
Other yep
Delay circuits:
Passive BM
Active BR
Other Bp
Selection and comparison circuits: ,
Amplitude (signal level) SA SA
Time SV SV
Freqv.ency SS SS
Phase SF SF
Other gp
Triggers: .
JK tYPe TV
RS type TR TR
D type ~
T type TT TS
Dynamic TD TD
Schmitt TL TSh
Combined (DT, RST and other types) TK TK
Other Tp
' 19
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Table 1-2 (continued)
Alphabetic Designation
By Conven-
By GOSTi tion Used
Functions Performed by Integrated Microcircuits 18682-73 Before GOST
Amplifiers:
High frequency3 W
In�:ermediate frequency3 UR
Low frequency3 UN
Pulsed signals3 UI UI
Repeaters Uye UE
Reading and playback UL
Display UM
Direct current3 UT UT
Sinusoidal signals4 US
Videoamplifiers UB
Operational and differential3 UD
Other UP
Filters:
Upper frequencies FV F'V
Lower frequencies FN FN
Band FYe FP
Rejection FR FS
Other ' FP
Shapers:
Square pulsess AG
Specially shaped pulses AF
Address currents6 AA
Discharge currents6 AR
Other AP
Memory elements
Matrix storage elements:
Ready access memory RM
Perman~nt storage RV
Ready access memory with control circuits RU
Permanent storage (u?ask) with control circ~:ts RYe
Permanent storage with control circuits and with
single programming � RT
Permanent storage with control circuits and with
multiple programming � RR
~lssociative memory with control circuits RA
Other RP
- 20
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Table 1-2 (continued)
- Alphabetic Designation
By Conven-
By GOST tion Used
Functions Yerformed by Integrated Microcircuits 18682-73 Before GOST
Arithmetic and digital circuit elements:
Registers IR IR
Adders IM IS
Half-adders IL IL
Counters IYe IYe
Coders IV ISh
Decoders ID ID
Combined IK IK
Other Ip Ip
Multifunctional IC:2
Analog KhA ZhA
- Digital KhL ZhL
Combined ~K
Other ~p
Microassemblies, sets of elements:
Diodes ~ ~
Transistors NT NT
Resistors NR NS
Capacitors NYe NYe
Combined NK NK
- Other Np
1 Auto-oscillatory multivibrators, blocking oscillators, and so on.
2 Microcircuits performing several functions simultaneously.
; 3 Voltage or power amplifiers (including low-noise).
4 Independently of the operating frequency range.
5 Single-shot multivibrators, blocking oscillators, and so on.
6 Voltage and current shapers.
_ In order to eliminate this type of difficulty a table of the correspondence be-
tween old and new identification codes for microcircuits is presented in Appen-
dix 2.
The letters K, KM and KR at the beginning of the microcircuit code characterize
_ their acceptance conditions by the manufacturer.
Example 1. The designation of the type of semiconductor logical circuit AND-
NOT/OR-NOT with the serial number of the development of the series 21 and the
number in the series by functional attribute 1 according to GOST is 121LB1. A
diagram showing how to construct the identification code for this microcircuit
is presented on p 22, Figure a.
zi
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- Example 2. The semiconducL~r microcircuit AND-NOT/OR-NOT series 121 has an
identification code by the rev~ked convention: 1LB211. The diagram for con-
structing the identification code for this microcircuit is presented on p 22,
Figure b.
Series
! Z1 LB 1
Serial number of develop-
ment of IC by functional
attribute in series
Functional desi ation
Serial number of series development
Structural engineering design
a~
Series '
~ LB 21 1
Serial number of develop-
ment. of IC by functional
attribute in series
Serial number of series develo ment
Functional desi nation
Structural engineerin desi
6~
Examples of constructing the code designation for the type of microcircuit ac-
cording to GOST 18682-73 (a) and the microcircuit developed before introduction
of this GOST (b) .
In the presence of dispersion of individual electrical parameters, Che maximum
operating parameters of the same type of microcircuits, an additional letter
(from A to Ya) is placed at the end of the identification code. When marking
the microcircuits, tr.e final letter on their cases can be replaced by a colored
dot. The specific values of the dispersion of the microcircuit parameters and
the color of the marking dot are indicated in the corresponding technical mate-
rials.
1-4. Operating Conditions of Integrated Microcircuits
Integrated microcircuits maintain their parameters within the limits of the
standards established by the technical specifications for specific types af IC,
under the effect of various operating factors on them and after the effect of
these factors.
The operating conditions of the IC, information about which is available in the
present handbook, are indicated in Table 1-3. .
22
~
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Key to Table 1-3:
a. Series number
b. Operating temperature range, �C
c. Multiple cyclic temperature variation, �C
d. Relative humidity of the air 98 percent at a temperature of, �C
e. Atmospheric pressure, Pa
f. Vibration
g. Frequency range, Hz
h. Acceleration, g
i. Multiple impacts with acceleration, g
J. Linear load ~aith acceleration, g
k. Single impacts with acceleration, g
Table 1-3 = to~
DTxoci~- BFf6paqxA J1xNe~1� O~li+-
Ten~H a n MHOro�
A'IHO~ONp2TkfOC ena;K- ~f~ If~A H04HbIC
Kp2THbl2 H8� yAepd
}'10WFp I1Nrepna.~ Da6ovna LLIIKIN4CCKOC H3NP� HOCTb ~T1.tO.f~CQNOC YAap~ rpy3Ka [}'CKO�
CCf1llH rea+neparyp, �C Next~e TC~ti1Cp8T}'pbl, uo3~yxa Aan~eti?~c, n8 C yCKO-
,C 98% np~~ Axanaaox YcKO� peHNeM, c ycKO� pe-
- Ten~nepa� vacTOr, pesxe, g peHxeM, Heent,
Type, �C tu 8 8 8
i
~a) ~b) ~d) ~e) ~g) ~h) ~1) ~J) ~k)
101 -60 =-}-8~ -60 =~-E5 ,0 6,7 � 10^- - 3� 105 5-5000 40 I~0 1~.0 1 C00
I .
K511 iC511PU1 j ~ K155
8 8 j Il: 8
F I
) Iout ~ ~ K155
6 II ~ ~-~P 8
Figure 5-58. Circuit for matching the VPL IC with low-level series. a--For the
state U~out~ b--for the state Ulout�
75
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Up s
K~11PU1 R
' 4 E 8 A A+B+CD+~f
~ E8 8
d
~ 8 CD
.D
E g EF
F
Figure 5-59. Output grouping circuit of the elements of the K511PU1 microcir-
cuit for organizing the OR-NOT function.
The load resistance for logical zero at the output of the KS11PU1 element must
be selected so that the current I flowing through it summed wiCh the current of
the controlled elements El~inp wi11 be less than or equal to the current I~out
flowing through the transistor of the KS11PU1 element (Figure 5-58, a):
El~inp + 1~ I~out~ I=~Up S- U~out)/R~ R-~Up S 2 U~out)/~I~out - EI~inp)
At the same time for logical one at the output of the KS11PU1 (Ulout~~ the resis-
tance R must be not very large in order to ensur~ a current flowing into the con-
trolled elements (Figure 5-58, b): �
I~ Ilout + EIlinp~ I-~Up s' Ulout~~R~ R 5~Up s- Ulout)/~Ilout + Ellinp)�
The outputs of the K511PU1 elements can be combined for realization of the AND�
OR-NOT function (Figure 5-59). Here the rated value of the resistor depends on
the number of grouped outputs and the number of loads.
The values of the resictor R, depending on tt~e number of grouped outputs and the
fan-out are presented in Table 5-5.
.
Table 5-5
K155 Series (Up S= 5 v) K511 Series (Up S= 15 v)
~group out Kfan-out R, kilohms Kgroup out Kfan-out R, kilohms
45 1 1.0 50 1 1.5
30 3 1.0 30 10 ~ 2.4
15 5 1.5 10 20 6.8
In Figure 5-60 the organization of the OR function at the output of the K511PU1
element controlled by other elements of the K511 series is illustrated.
The input and output pulse diagrams when matching the K511 series with the K155
series are presented in Figure 5-61.
76
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The conversion of the voltages of the logical zero and one levels of the TTL IC
to voltages of the logical zero and one levels of the VPL IC is accomplished
using the K511PU2 converter. The diagrams of these valves differ from the
standard ones in that the Zener diode in it is replaced by an ordinary diode in-
cluded in the forward direction for reduction of the voltage passing through
this diode. The circuit for conversion of the logical levels is prasented in
Figure 5-62.
K511LA1
A 8 AB
B K511PU1
g AB+CD
KS11LA1
~ 8 CD
D
Figure 5-60. Diagram of the organization of the OR function.
When matching the K155 series elements with the open collector output (K155LA7,
K155LA8) and K511PU2, the resistor R is connected to the collector. The resis-
tor R is taken from the relation indicated in Figure 5-63, a, b.
The remaining elements of the K155 series are matched with the VPL IC of the
K511 series without additional load. The fan-out for the IC of the K155 series
_ is equal to 30 when matching with the KS11PU2 microcircuit.
The diagrams of the input and output pulses when matching K155 series with K511
series are presented in Figure 5-64.
Ul - - - -
~
- t
`~rl
� UO C JJ -
~ ~
� ~ � OI ~
~-r--~_}�--. _ t
Figure 5-61. Input and output pulses when matching the K511 and K155 series
microcircuits for the K511PU1 microcircuit. U~inp--the logical
zero voltage at the input (U~inp ~ 1.5 volt); Ulinp--the logical
one voltage at the input (10 volt s Ulinp S 12 volts); U~out'-
logical zero voltage at the output (U~out ~ 0.45 volt); Ulout--
logical one voltage at the output (U~out 2 4.2 volts).
Special Cases of the Uses of Microcircuits. The K511 series microcircuits can
be used when operating on a line with distributed parameters (a long line).
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lteliable switch~ng of the receiving circuit is ensured on transmission of a sig-
nal over a caaxial cable with wave impedance p= 100 or 75 ohms up to 300 m
long.
- 8 8 8
- K155 series K511PU2 ti~~1~
Figure 5-62. Circuit for matching the TTL microcircuits with the VPL IC.
UP ~Sv) Up s(Sv)
~ ~
8 ~out j~ 811PU2 8 ~ut i Ilyp 81PU2 .
_ I~ t EI9 i 0 I~ I~n
ou i~l�n in~ ~ ~
K155 series ~ g K155 series
(with open coll ctor)
~ ~ (with open co lector)
EI o+U~ S ~out~Io d~ Ur S ~out~ I1 .+~'I ~ 6~
inp R out R ' out lnp
Figure 5-63. Matching the elements wit?},the open collector output with other
elements. a--For the U~out state; b--for the Ulout state.
a~
~
j J
1 t
~ou
~ ~
o� ~
~
t
Figure 5-64. Input and output pulses for matching the K155 and K511 series for
the K511PU2 microcircuit. U~inp--logical zero voltage at the in-
put (U~inp 0.4 volt); Ulinp--logical one voltage at the input
~Ulinp 2.4 volts); U~out'-logical zero voltage at the output
~U~out 5 1.5 volt); Ulout--logical one voltage at the output
~Ulout 2 12 volts).
For transmission of signals over a long line the K511LI1 microcircuit is used,
the high output current of the logical zero (I~out = 100 mA) of which ensures
fast charging of the spurious capacitance of the cable, which leads to less
stretching of the trailing edge of the pulse at the cable output.
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The KS11LA1, K511LA2, KS11LA3, KS11LA4, KS11LA5, KS11PU1, KS11LI1 microcircuits
can be used as the receiving circuits.
K511LI1
R2 K511LA1
g R1 300 8
85
Figure 5-65. Matching circuit for transmission of a signal over a coaxial cable
with wave impedance p= 100 ohms.
B uinp
t
B Uo tdel ~el p
t
Figure 5-66. Input and output pulse diagrams for signal transmission over a co-
axial rable R= 200 m long with wave impedance p= 100 ohms.
_ On transmission of the signal over a coaxial cable with wave impedance p= 100
ohms, the resistor R1 = 85 ohms is used for matching, which is installed at the
output of the K511LI3 control circuit.
An example of matching with signal transmission over the coaxial cable with wave
impedance p= 100 ohms and grounded braiding is presented in Figure 5-65. The
input and output pulse diagrams for the given matching with coaxial cable length
of Q= 200 m are presented in Figure 5-66. ;
The signal propagation delay time with respect to the pulse front tl�~del p�
0.9 microsecond, with respect to decay t~�ldel p- 1.1 microseconds for pulse
frequency f = 10 kilohertz.
On transmission of the signal over a coaxial cab le with wave impedance p= 75
ohms, the resistor R1 = 60 ohms is used for matching. An example of matching is
presented in Figure 5-67. T'he signal propagation delay time for a cable length
of R= 100 m with respect to the pulse front ti�~del p = 0.8 microsecond, with
respect to decay t~'ldel p- 1.0 microsecond for a pulse frequency f= 10 kilo-
hertz.
The noiseproofness of the given system when transmitting signals over a coaxial
cable with wave impedance p= 100 ohms decreases as a result of a drop in logi-
cal one level (Ulout - 11.2 volts) and a rise in logical zero level (U~out - 3�$
volts) as a result of the voltage drop on the matching resistors with power sup-
ply voltage UP S= 15 volts.
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Ttie noiseproofness with respect to posit~ve interference with logical zero level
at the input of the receiving circuit is: DU noise = 6.5 - 3.8 = 2.7 volts.
The noiseproofness with respect to negative interference with logical one level
at the input of the receiving circuiC is: dU-noise = Z1�2 - 7.5 = 3.7 volts.
- When using the coaxial cable or ungrounded cabled pair for signal transmission
. over two channels in one direction (for example, over the central core and the
braiding) sinusoidal oscillations arise in t:~e lines connected with reflection
of the cophasal wave, Figure 5-68. For mat ching the given system resistors are
used, the magnitude of which is R= p- Rout, where p is the wave impedance of
the line; i.ou~ = i~ ohms is the output impe dance of the VPL IC KS11LI1 for logi-
cal ~ero at the output.
+ 95.v
K~11LI1 ~pp K511LA1
' g R1 8
60
Figure 5-67. P~a.tching circuit for signal t ransmission over a coaxial cable with
wave impedance p= 75 ohms.
~ir~
' y .
O' '
~
w~ , ~ t
~A a
7
~
~7 y
ue b
~
~ i
- C
Figure 5-68. Diagrams of the input signal (a), the signal at point A of the
transmitting line (b), crosst alk at point B(c) using a cable with
p= 100 ohms, Q= 200 m long.
An example of matching with signal transmiss ion over the central core and the
braiding of a coaxial cable of length k= 30 0 m with wave impedance p= 100 ohms
is presented in Figure 5-69.
The signal propagati~n delay time with respe ct to the pulse front t~'ldel p- ~
- 200 nano:~conds, with respect to decay tl'~del p= 3 microseconds for a pulse
f requency o� f= 10 kilohertz.
F~'hen using a cabLed pair for a multicore cab le, the signals over the lines
(cores) which are transmitted in the opposi t e directions must be considered as
_ cophasal Ze~ and differential Zdm wave impedance. The differential wave imped-
ance Zdm is connected with the lines under e qual but oppcsite potentials over
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- wkiich an equal current flows, but in opposite directions. The impedance of the
given system is denoted as Z~~. In the given case Zdm = 2Z00�
The method of matching the cophasal and differential ~aave impedances consists in
the following:
l. The lines "A" and "B" over which the signals will be transmitted in opposite
directions are matched with the cophasal wave impedance Zem by the resistor equal
to Zem�
K511LI1 +95v K511LA1
8 R~ BS R3 Ry 8
300 300
A
8 RQ85~ B 8
K511LI1 K511LA1
Figure 5-69. riatching circuit for tranmission of cophasal signals over a co-
axial cable with wave impedance p= 100 ohms.
2. The line "A" is excited, and the magnitude of the crosstalk on the line "B" '
is measured.
3. Let us connect the cophasal impedance of the line ZOe to the differential
impedance:
U ~ Z~P - Zno ,
Z~ = U^ = Z~` + ~n~ ,
Znn� U~+U~ ?or,
where UA is the voltage on the line "A"; Ug is the voltage on the line "B."
4. Let us calculate the magnitude of the resistor matching the differential
signal on parallel inclusion with 2Zem~
17dm~rm
l~= 27_em-%dm ~
where Zdm = 2Z00�
An example of matching a coaxial cable with wave impedance p= 100 ohms, length
Q= 2U0 m, the signals over the central core and the braiding of which are
transmitted in opposite directions, is presented in Figure 5-70. The cophasal
signal is matched by the resistors R1 = R5 = 85 ohms.
Tlie resistance of the resistor Rg matching the differential signal is calculated
by the method indicated above: a signal of 11.2 volts transmitted over the ca-
ble braiding induces crosstalk of 1.7 volts in the central core.
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The diCferential impedance of the line is:
~01a 11,2-j-?;7 � 100., 74 ohms.
'Ihe resistance of the resistor matching the different signals is:
?.2.74. IOU
R' 2� I 00 - 2� 74 ~ 570 oh ms .
For transmission of signals over a long line the K511LA1, K511LA2, K511LA4 mi-
cr~~~ircuits can also be used. As the receiving circuits analogous microcircuits
can be used: factors limiting the length of the transmission line are small
output logical zero current of the given VPL IC (I~out = 12 mA) and cable ca-
pacitance which create long pulse delay with respect to the trailing edge at the
traus miss ion line output.
- +15v
- KS 11 L I1 RZ Ry K511LA1
8 R~ 85 300 300 g
K511LI1
KS11LA1 R RS g
8 3
BS
Figure 5-70. rlatching circuit using a coaxial cable with p= 100 ohms for
rransmission of signals in opposite directions.
+15v
K.511LA1 R K511L~1
8 ~~Z" 8
Figure 5-71. riatching circuit for signal transmission over a coaxial cable.
An e~:ample of signal rransmission over a coaxial cable with wave impedance p=
75 ohms, length 2= 100 m is presented in Figure 5-?1. The signal propagation
delay time with respect to the pulse front t~'idel p- 1 microsecond, the pulse
decay dclay tl'~del p- 3 microseconds.
Incrca5ing tlie Signal Propagation Delay. The signal propagation deiay can be
used to decrease rlie sensitivity of the circuit to dynamic (pulsed) interference.
Figure 5-72, a, gives the diagram of the use of an expanding input to increase
the signal propagation delay time. The dependence of the propagation delay ~n
the magnitude of the capacitance of the capacitor for the K511LA3, K511LA4 mi-
crocir~uits is presei~ted in Figure 5-72, b.
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K~it~.n3 ~'S~'~' t' T -
11
~~1
KS11LA4 0~ ,
~ 8 n
3 h
4 6 ,~q ~ .S
3 E ~ iti0
~
T ~ ~4
1
6~ p C
10 20 304050 f00 200 400picofarads
Figure 5-72. Example of the use of an expanding input to increase the signal
inclusion time.
usec tdel p
_ ~o
,
K511LA1
K511LA5 ~2 ha
g ,~4 ii
~
VD~
8
Q~ o
~C ' ~
4
6~ p C.
7 Z,? S 10 20 30 50picofarads
Figure 5-73. Example of the use of the in,puts of the KS11LA1 and KS11LA5 micro-
circuits to increase the propagation delay time on inclusion.
VD1--Semiconductor diode types KD521, KD522B.
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The type of capacitor is not regulated.
In the absence of an i~ansion input for increasing the signal propagation delay
time on connecting ~tdel ~ the diagram presented in Figure 5- 73, a can be used.
~ P
The dependence of the propagation delay for the K511LA1 iricrocircuit on the
capacitance using the KD52]A or KD522B diode is presented in Figure 5-73, b.
K511AA1 ~ 1
Y Z 8 3 ft. '
~1~K51111y1 K155
VD~ S 8 6 S~ 8 8
C~ 9 8
10 8 K511AA1 ~2~
12 8 11 g
_ 13 'Lj'
Figure 5-74. Diagram of functional Figure 5-75. Circuit diagram for
enlargement of the pulse duration. connecting the K511 series microcir-
VD1 semiconductor diode types cuits to contact relays.
KD503, KD521A, KD522B. Key:
Key: 1. KS11PU1
1. KS11LA1 2. KS11LA1
The pulse duration enlargement circuit is presented in Figure 5-74. The circuit
is controlled by a signal of negative polarity
tdel, p - 400 C,
where tdel p is the signal propa~ation delay, milliseconds; C is the capacitance
of the capacitor, microfarads.
The K511 series microcircuits can be used in circuits with relays operating on
15 volts. In such circuits the signal from the relay can be transmitted a
distance of up to 20 meters (Figure 5-75).
Operation of the K511LI1 Microcircuit as a Power Valve. Many areas of industrial
- application req uire the use of powerful valves such as, for examp le, the valve
for operation (switching) with relatively high current levels and actuating tubes
and relays. For this purpose the KS11L~.1 microcircuit can be used. It consists
" of two expansion valves with four inputs. In essence this circuit is identical
to the b ase valve circuit with the same addition that a powerful inverting
amplifier is added at the output.
The output transistor of the K511LI1 microcircui.t provides for operation with
high current l.evel to 100 milliamps. With this current IJout:1.5 volts as in
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ordinary valves. At the same time this output device permits realization of the
OR function at the output.
The circuit diagram for connecting the relay to the output of the microcircuit
is presented in Figure 5-76.
Construction of the Functional Units of the Equipment. The realization of logical
fimctions, except the AND-NOT function realized directly by the elements of the
series K511 microcircuit is realized by combining the AND-NOT elements in the
corresponding way.
Inasmuch as there are always several versions of realization of the function,
when putting the circuit together it is necessary to select the version with the
smallest number of elements in the circuit. In Tab le 5-6 examples are presented
for the realization of various functions.
The ANI~OR-NOT fim ction is realized from the K511 series elements with passive
collector input (KS11LA3, KS11LA5) by grouping the outputs of several elements.
Here if up to 3 elements are grouped, the fan-out is equal to 10. On connecting
each subsequent element the fan-out decreases by 2.5, that is, Kfan_out-10-
~Kgroup, out-3)2.5, where Kgroup,.out is the number of grouped elements with
respect to output. For organization of one function or another, ele~ents of the
series are selected with respect to the number of inputs corresponding to the
realized function. If not all of the inputs are used in the element, the three
inputs of the AND circuit must be grouped with one of the signal inputs within
the limits of the load capacity of the controlling element or they are connected
to a power supply or to the outputs of unused inverters (within the limits of the
load capacity of the latter), the inputs of which are grounded.
(j) K511/1N1 ~D~ UM.n ~2~
1 g
Z KR1
6
5 VDZ 18K 1f 12 6 ~ 4 Bb~xod
2 ~2)
Figure 5-123. Fimctional diagxam of the coupling of K134
, and K176 series viicrocircuits
' Key:
1. Input
2. Output .
, 3. UP.S=9.0 volts
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The K176 series microcircuits are coupled to the K155 and K158 series micro-
circuits to a conversion circuit and K134 series microcircuit presented in
Figure 5-122.
~2) UN.n=9,OB
D~ Rz
8 910
Z ~3 DZ D,~
11 1 9
~ 1~ 19 S B 10 11 12 ~
025
Bxod y R~ ZK f3 ( 3)
10 g
7
Figure 5-124. Functional diagram of the coupling of microcircuits
on the K176 series and the K149 series operating in the display
amplifier mode.
D1 K176LP1 microcircuit; D2, D3 K149KT1V microcircuit
Key:
1. Input
2. Up s=9.0 volts
3. 3L102B
The output of the K134LA1 microcircuit can be loaded by no m~re than one input of
the K155LA1, K155LA7, and K155LA8 microcircuits and by no more than four inputs
of the K'158LA1 microcircuit.
The series K134 microcircuit can be coupled to the series K176 microcircuits
thraugh the K149KT1V microcircuit according to the diagram presented in
Figure 5-123.
Figure 5-124 contains a diagram for coupling a pawerful inverter b ased on the
K176LP1 to the K149KT1V microcircuit operating in the display amplifier mode.
The operating diagram of the K149KT1V microcircuit on an incandes,cent tube type
- SN,~16,3-20 is presented in Figure 5-125. The K149KT1V microcircuit is controlled
on a powerful inverter based on the K176LP1 microcircuit.
U,~~ =9,08
D~ 8 ~2~
2 93 Dz D~
11 1 9 ~
19 5 8 10 R~ 11 12 ~
~1) ~ 6 12 14 ZK 13
- 8xoa 3 y
f0: 9
7
Figure 5-125. Functional diagram of the coupling of the K176
series microcircuits to-the K1~+9 series microcircuits operating
on an incandescent tube.
D1 K176LP1 microcircuit; D2, D3 K149KT1V microcircu3t
Key: 1-- input; 2-- Up.s=9.0 volts
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(1) u,?.~t ~2~
RH ~ 5Bt5%.
' Dy
~ BxoB � D~ 3 6 ,
R1
I ( 3) 7 5
Figure 5-126. Coupling diagram for coupling the K176 series
. ndcrocircuits to the K149 series microcircuits
D~-D2 K149KT1V microcircuit
Key:
1. U 1
2. UP~S2
3. Input
~ For operation of the K176 series microcircuits on powerful elements it is
~ e~edient to use the diagram presented in Figure 5-126 executed from the K149
~ series microcircuits. The circuit is started from a pawerful inverter formed
i by para11e1 connecti~n of thee inverters of the K176LP1 microcircuit. The feed
voltage UP.S=9.0 v~,1ts�5%.
~ The output curre,nt of the circuit must not exceed 75 milliamps; the resistance of
the resistor R required to insure the output current is determined from the
' expression
~ 50
, (i) R'~"~'15 ~
~ Key: 1. load
i
where Iload of no more than 75 milliamps is the load current; R no less than
0.45 kilohms is the resistance nf the resistor R1.
~ The dissipation power of the resistor Rl must be no less than 0.25 watts with a
resistor resistance to 600 ohms and no less than 0.125 watts for a resistor
i resistance of more than 600 ohms. The admissible deviation of the resistance
j R from the rated value must be no more than +5%.
j T}ie diagram presented in Figure 5-126 can be used to start the relay.
; It provides for tripping the relay with current parameters no more than 75 milli-
amps and voltage parameters of no more than 15 volts considering the admissible
deviation of the feed voltage.
' When selecting the type of relay it is necessary to consider the variation in
, resistance of the relay winding as a function of temperature.
~ The presented diagram, for example, provides for triggering the RES-44 type relay.
The relay is included in place of the load resistance Rload depicted in the
~ diagram in Figure 5-126. The feed voltage of the output transistor from the
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relay voltage overloads must be shunted by the 2D509A type diode. The feed
voltage IJP.s2 must he 12 volts+l0%.
Instructions for Constructing Communication Lines Between Microcircuits. When
designing the equipment b ased on the K176 series microcircuits it is necessary to
consider that the coup ling capacitan ce between the conductors connecting the
information transmission microcircuits to the information receiving mierocircuits
is the load capacitance for the microcircuits transmitting inforniation, trhe
increase in which leads to an increase in the dynamic current intake by the micro-
circuit and must not exceed 100 picofarads to exclude the effect of the cross
talk between individual wires in asynchronous devices.
When designing the equipment based on K176 series microcircuits it is.necessaiy to
provide for protection against pulsed interferenc~ on terminals 7 and 14 of the
microcircuits, for which it is recommended that decoupling capacitors, law and
high frequency, simultaneously, be inst alled in the feed circuits. The types of
capacitors and their capacitances are selected as a function of Che structural
design of the equipment.
The capacitances of the capacitors can b e approximately selected calculatirig the
following� low frequency, 2.2 microfarads for every 50 microcircuits; high fre-
quency, 0.68 microfarads also for every 50 microcircuits.
It is recommended that the decoupling capacitors be installed uniformly over the
area of the printed circuit board and also near the plugs.
The electric communication lines between the microcircuits inside the modules
can be made by printed circuitry and point-to-point wiring.
In the case of mixed wiring (printed and point-to-point) it is recommended that
the wires be run perpendicular to the printed wires on the printed circuit board.
The system of ground and feed buses must have minimum possible resistances and
inductances (with maximum possible capacitance between them).
The cycle pulse conductors more than 30 cm long in the bunched conductors must be
shielded (each individually). The length of the conductor is selected beginning
with the maxim~un admissible load capacitance for the cycle pulse amplifier by
the formula
0. 29P adKgroup
- ~wire - -~inpKfan-out, dyn�
Up.sF
The length of the wires between the microcircuits is selected beginning with the
maximum admissible load capacitance:
0.34Pa~
~wire U2 ~ -~inpKfan-out, dyn'
, p.s
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In the single-cycle synchronous devices and modules, it is.permissible to make
the information circuits using unshielded wires in the bunched conductor
communication lines containing inforn?ation and cycle circuits.
The transition from the D-triggers to the bunched conductor consisting of wires
more than 30 cm long must be made through the inverter of the K176LP1 micro-
circuit.
If the capacitance of the wires in the bunched conductor or cable exceeds the maxi-
mum admissible capacitance of the load of a single inverter, it is necessary to
make the junction from the I}-trigger to the communicatians line through the
amplifier, the diagram of which is presented in Figure 5-109, c.
In all cases the capacitance of the communication lines must not exceed the maxim~
admissible load capacitance for the element from which the junction to the commtmi-
cation line is realized.
Series K131, K155, and K158 Microcircuits
Reco~�nendations for Connecting Unused Inputs. In order to insure maximtmm speed
and noiseproofness, the unused inputs must be under constant attention. This
permits exclusion of overcharging of the capacitance of the open emitter of the
input transistor with respect to the circuit leads which increases the signal delay.
There are entire series of inethods of including the unused inputs.
The feed voltage limited to a value of 4.5 vo lts permits connection of the unused
inputs directly to the power supply.
If the voltage of the power supply exceeds 4.5 volts, then as a result of danger
of b reakdown of the input it is necessary to limit the current by a resistance
of more than 1 kilohm. In this case up to 20 inputs can be connected to one
resistor.
It is possib le to connect the unused inputs to the used input of the same logical
element if the load capacity is not exceeded for an output voltage corresponding
to the logical one level.
The unused input can be connected to the output of the unused inverting microcir-
cuit, to the input of which the logical zero voltage is fed. When necessary, a
logical zero voltage is fed to the individual unused inputs of the K155 series
microcircuits, which is determined by the truth table of the corresponding micro-
circuit.
If in the microcircuits performing the AND-OR-NOT functions one of the AND circuits
is not used, its inputs must be grounded. The unused inputs for connecting the
expanders remain inactivated.
Recommendations with Respect to Admissible Values of the Input Signal Front and
Decay. The signals which reach the input of the microcircuit must satisfy defined
req uirements, for othe~aise fail-safe operation of the elements cannot be insured.
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In particular, this pertains to the case where the IC are cc~itrolled from
external sources. In the given case the durations�of the input signal front and
decay are especially critical.
For the K131, K155 series IC, the admissible duration of theinput signal front
and decay must not exr_oed 150 nanoseconds (except the PC K155LA7, K155LA8). For
the K155LA7 and K155LA8 microcircuits the duration of the input signal frant and
decay is not critical.
However, when starting the K131 and K155 series IC from the PC K155LA7, K155LA8,
the duration of the output signal front and decay of the latter, which depenc~s
on the duration of the input signal front and decay, must not exceed 150 nano-
seconds. ~
For the series K158 microcircuits the maximum duration of the input signal front
and decay is as follows: for the triggers, 150 nanoseconds; for logical elements,
500 nanoseconds.
Recommendations with Respect to Insurance of the Fan-Out Factors. In order to
insure fitness of the logical microcircuits of different series under the condi-
tion of maintaining the parameters of the microcircuit stipulated in the techni-
cal specifi cations for them, it is necessary to satisfy the following requirements
for a11 operating conditions.
a) The output voltages of the microcircuit generators in the open and closed
state for a defined current (depends on the number of loads) must correspond to
the input threshold voltages of the closed and open state of the l.oad microcircuit
considering the magnitude of the interference voltage, that is,
Uout g~U~h'reshold tinterference'
1 1 1
Uout g=Uthreshold+Uinterference'
where U~ and U1 are the output voltages of the generator microcircuit in
the openuan~ close~usf ~te, respectively; U~hresh and U~resh are the unblocking
and blocking thresholds, respectively, wit~ respect to the voltage of the load
- microcircuit; U~nt and U~nt are the admissible interference voltage for unblocking
and blocking the load microcircuit, respectively.
b) The value of the total currents of all the load microcircuits connected to the
output of the generator microcircuit must not exceed the values of the output
current of the generator microcircuit in the open and closed states:
Kpea ~2~
lcdx. r ~ Fj ~ex. xr~
(1) K ~ (3)
p~9
~ ~ ~ /Bx. x!~
/oWa. r
(a)
Key: 1. out.g; 2. fan-out; 3. inp. load i
124
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where Iout. and Iout are the output ~currents o~ the generator microcircuit
in the opengand close3gstates, respectively; I~np . Ioad i and iinp,load i~~are
the input currents of the load microcircuit in the closed and open states,
respectively, for one logical input; Kfan-out is the number of logical inputs of
_ the load microcircuits connected to the output of the generator microcircuit.
c) The value of the total capacitance of the inputs of the load mierocircuits
(considering the wiring capacitance) for which the time parameters are regulated,
that is,
Kpe~ Kp~a
Cn. r% Lj Ce:. itt'~" ~j CrI~
~1~ !ml i~~ ~2~
Key: 1. load. g; 2. wire
where Cload.g is the load capacitance of the generator.~microcircuit for which the
time parameters are guaranteed (15 picofarads); ~inp.lo~d i is the maximum
capacitance of the load microcircuit input (approximate y 3 picofarads); C~,~ire i
is the capacitance of the wiring of one input of the load microcircuit with
respect to the output of the generator microcircuit.
When necessary th total load capacitance of the PC-generator can reach a maximum
load capacitance of 200 p~.;:_~farads, but the dynamic parameters in this case are
not regulated.
The fan-out of the generator microcircuit during ~oint operation of the logical
microcircuits on each other is determined by the smaller number of the values of
Kfan-out~ Kfan-out in accordance with the expressions:
K~aa ~eux. ~2~
a �
_ p~l~ lo�x. u ~(3)
/ewa. r ~
paa= -
/sx. x ~
K~ ~~~G4)-cM ~(5 )
Co:. a
Key: 1. fan-out; 2. out. g; 3. inp. load; 4. load.g; 5. wire
where K~an-out~ Kfan-out are the load capacities with respect to current of the
generator microcircuit in the open and closed states; K~ is the capaciti.ve load
capacity of the generator microcircuit.
When grouping several inputs of one logical AND element, the current I~np remains
unchanged, and the current IinP increases proportionally to the number of
grouped inputs.
The inp uts and outputs of the K131, K155, and K158 series microcircuits can be
connected to any elements or circuits based on discrete components, including,
for example, transistors, diodes, transformers, resistors, relay contacts, and so
on if the magnitude and shape of the voltage and current at the input and output
125
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of the PC satisfy the requirements of the technical specifications. In order to
~Userve the requirements of the technical specifications for the input and output
signals of the K131, K155 and K158 microcircuits it is necessary to design thp
circuits on the b asis of discrete components in such a way as to exclude the
appearance of voltage and current surges exceeding the admissible values at the
inputs and outputs of the IC and also the requirements on the pulse front and decay.
The values of the fan-outs during operation IC of different series are presented
in Tables 5-8 to 5-I3.
Recomm~endations for Grouping the Microcircuits with Respect to Output. The group-
ing diagram for the K155LA8 microcircuit with respect to output is presented in
Figure 5-127.
When connecting the resistance R1 to the elements of the microcircuit K155LA8,
the AND-NOT function is realized, and when grouping several elements with respect
to output the AND-OR-NOT function is realized.
Table 5-9
~3~ Tun NACPy31(fl - OXOIlW MC cepin~ K~55
~1?=_ xis~n~i. KI55~'IAY. K155TV1 K155~Ye2 K155IYe4 K155IYe K155IR1
na ~2) Kis~nna, Kis,naa,
0/ K155J(AG, K145JIPl, + a
x" T{lR MHKpOCXCMbI ((15oJ1P:i. K15:,11Pi, _ ~ I
ao KliiKfl7. {il,-}i61E6. ~ri~ ~ `"O1
~ ~ K15.5NEi, KI5iJI{11, ~ ~,g c.. M = Noo
o A NA3. KISSKnb, c _ =
.T. .'E \ K ~.SS.~I ~~5 ~ ~ N N ~ 'D I ~ N ~ ~ ID
1K155LA1, K155LA2, 10 IO 5 10 5 10 5 2 10 5 10 5
K155LA3, K155LA4,
K155LR1, K155LR3,
K155LR4, K155TV1,
KI~5I~e5; K155IR14~
K155TM5 K155TM7,
K~55IYe8; KI~STMZ~'
~K15~LA6 I ao ? so i i~ ~ ao t is I 7 I so ~ is I~ ~ ao ~ i~ ~ 30 ~ i5
t:~J`~ K155KP7 ~ io ~ io ; s j to I s ~ 2 ~ to j 5 ~ z ~ io ~ s ~ io ~ s
K155IM1, out. 4, I lo I ~o I 5 I ?o I 5 I ? I lo I 5 I 2 I lo I ~ I 10 I 5
~ 5 2 5 2 I ~ 2 I 1 ~ 2 5 2
~K155IM2, out.10 I 10 I l0l 5 I l0l 5 I 2 I l0l 5 ~ 2 I IOI 5 I l0l 5
K
55
M3, out. 14 I lo I Io I~ I lo j 5 2 I lo I 5 I 2 I lo I ~ I lo I 5
I z'�~~''~- ~o I iu I s I io I s I 2 I io I ~ I 2 I i0 I s I l o I ~
K155LI, K155LP5,
K155KP5, K155ID3
Key :
1. Loaded series No 4, K155LA1, K155LA2,
2. Microcircuit type K155LA3, K155LA4,
3. Load type inputs o~ the K155LA6, K155LR1,
K155 series IC K155LR3, K155LR4,
K155KP7, R55Iye6,
K155IYe7, K155LI1,
K155ID3, K155KP5,
K155LP5
126
~ ~ ~ ~
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;
Table 5-1~
' ~1 ~2~ Txrt unrpy3Kx-exoltw MC cepxx K155
~
HoMev K155TT+5 KL55TI~ KL55TM K155IM KL55TM~ KLSSIY 8 K155TI~2
xarpy� -
~
Hcae� THn MxKpoc:ceMa ~o _ Nv,
MOA ~ -
CCpNH = ~ = ~ u~ oo ~i_,~;
N M GO e7 l~ a N~ :.r. ~ O :+1
C
J N d' CV Cq ~ ^ ~ M ^
. N e+!^ Qf N M V~ r
'K155LA1, K155LA2, ' ~ 2 5 2 10 2. 10 2 l0 2 10 5 10 5 5 3
K155LA3, K155LA4,
KIS~LR~i; KI~STVI'
K155IYe2, K155IYe4,
, K155IYe5, T.].55IR1.,
K155TM5, K155TM7 ~
K155IYe6, K155IYe7,
' $1~SSY~.8, .
K155LA6~ ~ 15 7 I 15 I 7 I 30 I 6 ~ 30 ~ 7 ~ 30 I 7 I 30 I 15 I 30 I 15 I 15 I 10
' Ki55
K155KP7' ~ 5 I 2 I 5 ~ 2 I 10 I 2 ~ 10 ~ 2 I 10 ~ 2 I 10 I 5 I 10 I 5 ~ 10 I 5
5165IM1, out 4 I 5 I 2 I ~ I 2 I 10 I'l I 10 I 2 I 10 I 2 I 10 I 5 I 10 I 5 I 5 I 3
K S I M 2, out. 10 2 I ~ I 2 I ~ I 5 I ~ I 5 I l I I`2 I ~p I~ I 10 I 5 I 5 I 3
1, 12 5 2 5 2 10 2 l0
155IM3, out. 14 I 5 I 2 I 5 I 2 I 10 I? I 10 I 2 I 10 I 2 I l0 I 5 I!0 I 5 I 5 I 3
2.,-~i.r.~..~.~.~..
~K155LP5, K155 D3~ 5 I 2 I ~ I 2 I IO I 2 I l0 I 2 I lo I 2( Io I 5 I 10 I 5 I lo, I 5
Key:
1. No of loaded series
2. Type of microcircuit
3. Load type inputs of the K155 series IC
The value of a resistor R1 is selected as a function of a required output group-
ing factor Kgroup and the number of loads Kfan-out in accordance with the formula
~ 0 ~ 1
Up.s.max Uout
Figure 5-141. Diagram o.f a short pulse shaper (a) and operating
time diagram (b).
C1 the capacitor is selected as a function of the output pulse
duration; Dl K155LA7 microcireuit; D2-D K155LA8 microcircuit
Key: A. 5 volts+5% UP.s~ B� Uthresh~ Uth resh-~�35 volts; D. u1=2.4-4 volts
E. up=0-0.35 volts; F. U, volts -
137
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The K109LI1 microcircuit can be loaded on the series K155 IC through a MGShVE
type shielded conductor. It is permissible to connect no more than two inputs of
the K155 series IC to the output of the shielded conductor with a conductor
length of 5 meters and is no more than one input with a conductor length to
30 meters. ~
The circuit diagram is presented in Figure 5-149, a, b.
Recommendations with Respect to Insuring Noiseproofness During the Structural
Design of Equipment. The feed voltage of the units and modules executed from the
series K155 IC (the "ground" and "feed" buses) must be distributed by wires with
the lowest possible resistance.
When using multilayer printed circuit boards it is recommended that the "feed"
buses be laid out in one layer, and the "ground" buses in another ad~acent layer;
the buses should be located one above the other. In the presence of a free area
in the layer it is recommended that it be used to enlarge the surface of the
"ground" bus.
.D7
D1 DQ ~3. D� Ds' 8 1
,X 8 s a $ 8 y
g
D6�
. 8
d~
r
B U T
~1~ iMex ~2> t
at, f,
e~
'CN'I TNZ ~ 4 ~
b ~
' t~a,P ~5)
Figure 5-142. Diagram of a pulse shaper with respect to input signal
front and decay (a) and operating time diagram (b).
D1-D6 K155LA3 microcircuit; D~ K155LRI"microcircuit; 1 0
~t1='~~+.inp-Ti+tdel,P' ~t2=T��Tload.inp-Ti2�tdel,p~ Tload 1~Tload 2=ntdel~P
+(n-1)ta~~ P; n is an even nwnber of elements participating in the
signal dega~
Key:
1. U, volts ~
2� Ti, inp
3. Til
4. Ti2
5. tdel, p
138
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UM.n SBtS% (A)
R~ B U (B)
'IK
8~ ~ 8 0 83 8 0 ~ t.
~ O t
. Q t
d) b~
Figure 5-143. Diagram of a square pulse generator (version I) (a)
and operating time diagram (b).
D1-D3 K155LA8 microcircuit; D4 K155LA3 microcircuit;
C1 the capacitor is selected as a function of the output pulse
duration (no more than 0.003 microfarads)
Key:
A. Up.s 5 volts+5%
B, U, volts
- U".n ~A) B U (B
R~ O
D~ DZ Da D4 D5 ~
g ~ 8 ~ 8 8 8 DO t
C~ ~ t
b)
Figure 5-144. Diagram of a square pulse generator (version II) (a)
and operating time diagram (b).
C1 the capacitor is selected as a function of the output pulse
; duration (no more than 1 microfarad); D1 D4 K155LA8 microcircuit;
D5 K155LA3 microcircuit; R-- resistor 1 kilohm + 10%;
Ug.s power supply +5 volts~5%
Key:
; A. UP.s
B. U, volts
The low-frequency interference penetrating to the system by the feed buses must ~
' be blocked using a capacitor with a capacitance of 0.1 microfarad for the IC
connected between the "feed" and "ground" terminals directly to the locations of
the beginning of the printed circuit wiring.
The decoupling capacitances with respect to high frequency must be uniformly
distributed over the entire area o.f the printed circuit board with respect to the
IC calculating one capacitor for a group of no more than 10 mi crocircuits, a
capacitance no less tfian 0.002 microfarads per-microcircuit.
~ 139
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8 8a~x.V
Bb~x. J'L
(A) ~
8 1 8 8 1 O 8 1
8 8 8
Bx.'l,r
(B> O .
8 8 Q 81
0 8
8
~
~
Figure 5-145. Diagram of a single pulse generator
Key:
A. out ~
B . inp ut
The decoupling capacitor installed in direct proximity to the microcircuit
forms a circuit with low resistance to high frequencies.
The capacitors are installed on the same side of the board that t~e IC are
~ located on in direct proximity to t:~em. For blucking the high-frequency pulsa-
tions it is necessary to use inductionless capacitors.
In the presence of K155LA6, K109LI1 and other IC of the K155 series with increased
degree of integration on the printed circuit board, the capacitors for each of
these microcircuits with a capacitance of 0.1 microfarad ar~e installed if
necessary in direct proximity to the IC.
The microcircuit with increased degree of integration of series K155 must be
installed on the boards as close as possib le to the plugs and directly on the
"ground" buses.
i '
In order to supply the feed voltage and connect the "grovnd" bus it is recommended
that the edge contacts of the plug be used.
Recommendations with Respect to Electric Communications Lines. In accordance
with the purpose, the electric communication lines are divided into lines for
transmitting information, �or synchronization, for display, for commutation and
the "feed" and "ground" buses.
140
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;
i �
I,
Bx. V t -
~A)
; 1O t
I ~ t
~
O3 t
I 4 t,
0
O t
~
' O6 t
,n~
eb~x.n t
, (B)
Bb~x.V t .
~ Figure 5-146. Operating time diagram of a single pulse generator
Key:
, A. input
B. output
i ~~.n 5B.t5~~s
' 1x 1K 8 ~ Y
S~
Da
~B~ M11-12 g
Figure 5-147. Circuit ~or eliminating jarring of the contacts ~
Key:
- A. Up~S 5 volts+5%
B. MP-12
141
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D~ ~1~ D~.
g K109/)N1(.4,6~ K155/lA3 ~ 2) 8 K109AN1 DZ
8 ~3~ X~58n,a~4~
5 R~ 62 ~
b )
Figure 5-148. Circuit diagram of a~natched cable RK-75 to the
output of the K1091I1 (A, B) element.
a-- para~lel matching; b-- series matching
Key:
1. K109LI1(A, B)
- 2. K155LA3
3. K109LI1
4.~ K155LA3 ~
~ D~ �
8 D2
R~ $ ,
_.t_~ ~ , 1. 1K
150 ~T---- R2
Q U~n
D~ R3 59-*5�/a
$ 'IK
~
D1 ZZ D2
$ R~ ~ - $
R
150 ~ b ) !K
5Bf5% Un.n
Figure 5-149. . Matching circuit of the K109LI1 microcircuit with
the commtmication line and the K155LA8 microcircuit.
D1 K109LI1 microcircuit; D2 K155LA8 microcircuit;
!Cl conductor MGShVE-0.35 mm2 to 5 meters; ~2 conductor
MGShVE-0.35 mm2 to 30 meters ~
The information communication lines are designed to transmit information signals.
Within the limits of the printed circuit board it is recommended that these lines
be made using printed circuitry.
The wires on dif,ferent sides of tfie board or in ad3 acent layers must . cross at an
angle of 45 or 90�. The wires must be as short as possible. The maximu~ admissi-
tile length of printed parallel wires~~located on one side.of the board or in one
layer with a printed w3re width of 0.5-1.5 mm must not exceed the values pre-
sented in Tatile 5- 16 (the length of the printed wires is presented in millimeters).
142
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Tab le 5-16
Kone~iccrno nepan� NnTepeenw MCNfAy IIC4HTNdMN O~OPOAMNNAMIt. MM ~2~
nenb~iaz npoeoA�
(1) x~~KOa ob I ~,o I ~.s I a,o I 5,u
- 2 I00 120 130 150 170
, 3 60 70 75 90 100
4 50 60 65 '75 AO
; ~ 5 40 50 60 65 70
Key:
1. No of parallel wires
2. Intervals between printed wires, mm
Note. The admissible length of the p rinted wires not going beyond the limits of
the printed circuit board can be increased by 40% with respect to the values
indicated in the table.
It is recommended that the information communication lines between boards be
realized using panel mounting which can be structurally in the form of a printed
circuit board or panel having a shielding coating on the wiring side. The shield-
ing must be connec~ed to the "ground" bus of the printed circuit boards.
; The length of the communication lines on the panel mounting when executing them
by panel mounting is defined as the difference of the length obtained according
to Table 5-15 considering the note and the length of the communication lines on
the board.
If the length of the information com~unication lines exceeds 20 cm, it is
recoAnnended that they be made using dense-packed point-to-point wiring. The
communication lines up to 20 cm long for asynchronous devices and up to 30 cm for
synchronous devices are made from single wires.
It is permissible to connect up to 5 radial lines with a total Zength of no more
than 50 cm to the output of one transmitting element.
The communication lines from 0.2 to 1 meter long within the limits of the panel
are made using unmatched cabled pairs. It is permissible to connect no more than
3 cabled pairs with a total length of no more than 2 meters to the output of one
transmitting element.
When organizing the connections using unmatched caliled pairs the delay time of the
signals increases and can be determined. by Table 5-17.
The return wires o~ the cabled pairs must be "grounded" on the transmitting and
receiving ends. The length of a separate part of a cabled pair.must be no more
- than 3 cm. It is perniissitile to connect no inore tfian 3 return wires of the
cabled pairs to one contact of the plug.
143
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Table 5-17 -
Delay increment at Delay increment
Coupling Recommendations with the output of the at the output
diagram respect to applica- trans~:tting~ ele-~ of the communica-
tion "ment ~ " ~ ~ ~ tion ~ Iine
~tdel' etd.e~~ . - tdel' ~t > > .
nano-. nann= nano- n~~i~
~ ~seconds' ~secorids ~ ~ ~ ~seconds seconds
For the radial layout
method the load is con-
i~ N~ centrated at the end of
a communication line
B ~i Hr
1~ For the combined layout
N method the load is dis-
s trib uted arbitrarily
Qi cabled along the length of the
pair or communications line
cab:le with l~E=Q1+k2+SC3~2 meters 8Q~ 6~.E 8~,~+5l~i 6Q~+6~i
wave imped-
ance of Length of each commimi-
100 ohms cation line no more
than 1 meter
It is permissible to separate the taps from the tmmatched cab led pair by a single
wire within the limits of the load capacity of the transmitting IC; here the total
length of the taps must not exceed 0.2 meter.
In the communication line laid by a cabled pair, separate sections can be run by
a single wire; here the total length of the single wires in the given commtmica-
tion line must not exceed 0.2 meter, and the length of the entire coAUnunication
line is no more than 1 meter. ~
When laying out communication lines it is necessary to arrange them in such a way
as to permit simplification of the communication line and insure maximum length
of it.
Conanunication lines from 1 to 3 meters not going beyond the limits of the device
must be made as matched cabled pairs. The matched coimnunication lines more than
3 meters long and also communication lines going beyond the limits of the device
must be made using a coaxial cable with wave impedance of 100 ohms. The cammunica-
tion lines are~~matched. using the 82 ohm resistor with admissible deviation of the
resistance by +5%. Tfie resistor must be installed directly at the output of the
transmitting IC accordtng to Tahle 5-17.
The length of a coaxial ca~ile and number of inputs connected directly to the out-
put of the.transmitting element and also at tfie output of the communication line
must not exceed the valups indicated in Table 5-17. When determining the incre-
ment of the propagation delay atdel ~Tab 1e 5-18) the length !C of the communication
line must be taken in meters.
144
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The load N1 is connected by a single wire no more than 0.2 m long or a cabled
pair no more than 0.5 meter long.
It is permissib le to transmit information signals within the limits of the
device using a shielded conductor with mandatory sending of a gatiiig signal over
the coaxial cable. The gating signal must be delayed with respect to the inf~rma-
~ tiQn signal by the time of effect of the t~ansient processes, an.d the p+ul.se dura-
tion of the information signal must be selected fram the condition.
Ti~tdel.gate+tswitch'
where td l.gate is the delay time of the gating signal with respect to the
informat~fon signal; tswitch is the switching time of the circuit receiving the
information.
The communication lines for transmitting synchronization signals ~r1.th printed
circuitry must be removed from the information lines and from the synchronization
lines of another phase by a distance of. no more than 2.5~mm or shielded by a
"grounded" printed wire connected to the common "ground" at one point. The w~dth
of the printed shielded wire must be 2 or 3 times greater than the width of Che
synchronization circuit wire. The length of the communication lines within the
limits of the printed circuit board is selected considering the data in Table 5-17.
The communication lines for the synchronization signals within the Iimits of the
panel can be laid out using a cab led pair to 35 cm long or a single wire to 10 cm
long. From the cabled pair it is permissible to make taps by a single wire to
10 cm long, where the total length of the single wire must not exceed 20 cm.
The synchronization signal communication lines within the limits of the device
with a length of more than 35 cm can be executed using a matched or unmatched
coaxial cable with a length of no more than 50 cm.
It is recommended that the co~unication lines from the output of the IC to ttie
' display elements be made by single wires which can be laid in a bunched conductor.
The length of the communication lines in this case will be deterniined from the
conditions of insuring maximum admissible voltage applied to the output of the
; IC (5.25 volts for K155LA8, 7 volts for K155LA7, 60 volts for K155ID1).
It is recommended that the commutation communication lines (the lines between
switches, toggle switches, relay contacts and microcircuit) be made with shielded
conductor.
The application of single wires to 0.3 meter long and cabled pairs to 3 meters
' is permissihle.
- It is not permissihle to lay information, commutation and display communication
lines in one bunched conductor.
Single wires~ cannot be laid in bunched co~ductors either sep arately or with
cabled pairs. Unmatcfied and matched cafiled pairs can lie laid in bunched
conductors or groups of conductors ~ritliout ~ tie and also in stulis.
145
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Table 5-18
( 3)
~ 2 1lpxpanleexe
KoaeqecTeo seAepHCKa nPpPau~exxe ,qnuxa
9newex7oe cpa6ateiesenA ~6~ saAepHCKx ~~~vacrKOe
xarpyaKe nepeaaauiero xa edxoAe nxxxx coaax.
9nenexra nxxxx eaA~x r Txn nepeaaaulcro
~1` CXCNB CBA3N 9A0N2HT8
J 0~l LO LO LO ~~9~ ~1Q~
N! I N' Aj3~ ~ oI9A. C1j3C . I ~3j~' HOqNBAI CyT
~ ~1`~ ~ CBA3b
~F~~
2 2 8 6 8-~-51 6-}-5! !1 `3 -,n~6o~ nOfHY
CKN$9JI2-
~12~ M2HT C HBPP}~30qH0~
d d20 j~ NZ ~ ~ CIIOCO~SHOCTbb Kpe3~
2 2 8-}- l Ol 6 8-~-151 6-~- Sl - ll ~ 3 ~ 10
BumaAnap� ueu xa6en~ cBonNOBa,u
conpomuBneNUewP = f00Ow
(11) 17 1 g 6 8-{-51 6-{-5l ~11 ~ 3 Tonaxo K155JIA6
6 2 �
(14)
8 s20M t~ tt
~N2 16 2 g 6 8-~-S1 6-{-5l ~1 ~ 3 Tonbxo K155:'1~G
~
- ` P-fanoM (14)
2qszz~
, F 1' !i < 0.5
8 BZ�" �i? N 0 2 8-~-21 6 8-{-5l 6-}-5l ; 0.5 Tonbxo K155JIA6
N = =='o (14) ,
' : p-~cooM
(12)
_ ~Y ~
1. Coupling diagram
2. No of load elements
3. Increment of the response delay of the transmitting element
4. Qtae1l, nanoseconds
5. taei, nanoseconds
6. Delay increment at the output of the cammtmication line
7. Length of the communication line segments, meters
8. Single coupling
9. Bunched conductor
10. Type of transmitting element
11. Cabled pair or cable with wave impedance p=100 ohms
12 . ohms
13. Any logical element with load capacity Kfan-out~10
14. Only K155LA6
When e~rpanding the logical possihilities o~ K155LA1, K155LR1, K155LR3, K155LR4
microcircuits us.ing expander microcircuits, the length of the communication
lines between the IC and the expanders mus~t not exceed 4 cm. Here the total
length of the commun~cation ltnes inust not exceeil 12 cm.
The terminals 7 0~ tfie K155LD1 and K155LD3 microcircuits must be "grounded."
146
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~ FOR OFFICIAL USE ONLY
~M.n 5B 5 ~ 1)
~ 330 t 30
I~
- -
75Q RZ R
750
~
pepedaaufan (4~nepe8arou~ceM u
npu~ eMaM .
, ~ 2~ cxen~rd ~pueMHaA cxeMa ( 5)
~1 .D1
; _ exoa s s eb~xoa ~6~
( 3)
Figure 5-150. Diagram of the organization of an intrainstrument
code main.
D1 K155LA7 microcircuit; D2 K155LA3 microcircuit;
~ cabled pair k,3 meters
' Key:
; 1. Up,s 5 volts+5%
! 2. Transmitting circuit
~ 3. Input
~ 4. To the transmitting and receiving circuit
~ 5. Receiving circuit
6. Output
~ The f~mctional diagram of the organization of an intrainstrument code main
� executed from cabled pairs is presented in Figure 5-150.
j The maximimi coupling length from the transmitting circuit tA the receiving cir-
' cuit must not exceed 3 meters. The K155LA7 microeircuit (to 8 circuits) is used
as the transmitting circuits, and the series K131, K155, and K158 microcircuits,
~ as the receiv.Lng circuits. Here it is necessary to consider the increased load
' on the transmitting circuit. The transmitting and receiving circuits can be
I connected at any point of the main.
i
~ The duration of the pulses transmitted over the main must be no less than
0.4 microsecond.
i
The length o� the communicat3.on lines during ~oint operation of the K131, K155
and K158 series microcircuits must be decreased by 1.5 times if the transmitting
; elements are the K131 series microcircuits, and it can tie increased by 1.5 times
i if the K158 series microcircuits are used as the transmitting element by~compari-
, son with th.e recommendations presented for tlie K155 series microcircuits.
The recomomendations~presented in the present section.for insurance of noiseproof-
' ness do not deseribe all tfie pos~sible cases of protection a~;ainst interference;
~ therefore in order to create the optimal structural design additional studies
i are necessary in each specific case.
~
!
j
147
I
FOR OFFICIAL USE ONLY
-i ~
i
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FOR OFFICIAL USE ONLY
Examples of Constructing Functional Units,of Equipment.~ Some circuit engineering
principles of the implementation of.complex logical functions and.the construction
of the functional units based on the series K131, K155 and,K158 microcircuits are
presented tielow.
The functional diagram of an asymcnetric counting trigger based on six AND-NOT
elements is presented in Figure 5-151. Its operating time diagrams are presented
in Figure 5-152. The trigger is set to the~].ogical zero state o~ simultaneous
feed of the logical zero voltage to the inpute of the elements D4 and D6 indepen-
dently of the voltage level on the eounting input C. For a logical zero voltage
on the counting input the trigger ean be set to logical zero on feeding a logical
one voltage on the counting input to the input of the element D6.
Q
.S~ D1 D~ BxoBC t
8 8 Q ~2~
. R1 Be?xod Ds t
Be,xoa DZ t
DZ D5
8 $ 8e~xod D6 f ~
~C
SZ q BeixoBA f
D,~ D6 Be~xod Q f
8 6
Rt Bn?xod Q t
Figure 5-151. Functional diagram of Figure 5-152. Time diagram of a
a counting trigger coLmting trigger
Key:
1~. Input C
2. Output
The trigger is set to the logical one state with logical zero voltage on the
coimting input by feeding a logical zero voltage to the input of the element Dl;
with a logical one voltage on the counting input and the "set 0" inputs (R1, R2),
by feeding the logical zero voltage to the input of the element D5.
With simultaneous feed of zero potential to the inputs of the elements D1 and D5,
the logical one state is set independently of the potential of the counting input.
Therefore on entering an arbitrary code counter and when setting the reversible
counters to the logica~ "0" state it is necessary to feed~the setting pulses to
both "set 1" inputs S1, S2 simultane~usly or separately depending on the type of
operation.
When constructing the s~mttning eounter, signals a~e fed to the inputs of the sub-
sequent b.its:fxom tfie "0" output (the ele~ents D4 of. tlie preceding trigger), and
when constructing the s.ubtracting counter, from the "1" output (the elements D1
of tlie preceding triggers).~~At tfie output of~the element D3 the input pulses of
negative polarity with frequency finP/2 are repeated.
148
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~ FOR OFFICIAL USE ONLY
~
The minimum setting pulse duration ~or the trigger in the
i
p1 1,0
; Ti.set,min�td~I.p.max+tdel.p.max'
~ The minimum operating cycle duration of a single trigger
~
rmtn =3l~A~P ~-~3$11
1 ~
Key: 1. del.p
~ The signal propagation delay by one bit when constructing a series coia?ter �
(1)
~ ~3d. pip=taAl. D'~'t l~
; Key: 1. del, p 1 bit; 2. del, p
The duration of the input pulses of negative polarity
~.o
' r9~~-f-t3A. p�
Key: 1. i; 2. del, p
The duration of the input pulses of positive polarity:
TN ~ 213A~ U'I"~sA. p�
If the signal is picked up from the output of the elements D3, the minimimm
; operating cycle of a single trigger and the minimum durations of the input pulses
are:
t~~=3~3A. P'~'~s14~ pi
j TH ~ 213A~ P"~" tsA. p i
' Tn ~ ~aA. p "~.'14A~ p�
~ The circuits executed from J.: and D-triggers of the K131, K155 and K158 series
are set to the "0" state by a negative pulse fed to the input R. The code is
entered in two cycles: first setting to "0," then entering "1" in the correspond-
' ing bit.
~ When executing circuits fron a K:L55TV1 microcircuit and using preliminary setting
and clearing it is necessary to feed the logical "0" voltage level to the
synchronization input.
; Code Converters. The functional diagram of the 2421 code te 7-position code
; converter constructed �rom logical AND-NOT elements is presented in Fi~ure 5-153.
! The speed of the circuit is determined liy the delay of the two AND-NOT logical
! elements. ~
; The conversion of the 8421 code to binary-decimal code is used for data input and
processin~ and to cantrol the display elements. The functianal diagram of the
149
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FOR OF'FICIAL USE ONLY
$421 code to 7-position binary-decimal .code converter constructed ~rom AND-NOT
logical elements is presented in Figure 5-154, The speed of the circuit is
determined by the delay of the four logical AND-NOT elements.
The tunctional diagram of the 8421 code to 2421 code converter coi~structed from
the E1ND-NOT logical element is illustrated in Figure 5-155.
The speed of the 8421 code to 2421 code converter is determined by the delay of
the three ANI~NOT logical elements.
The functional diagram of the 2421 code to the. 8421 code converter constructed
from the AND-NOT logical element is presented in Figure 5-156.
The speed of the 2421 code to 8421 code con~~erter is determined by the total
delay of the two AND-NOT logical elements.
The functional diagram of the Johnson code to 8421 code converter constructed on
the basis of the AND-NOT logical element is presented in Figure 5-157.
The functional diagram of the decimal-to-8421 binary-decimal code converter
constructed from ANI~-NOT logical el_ements is presented in Figure 5-158.
The functior:al diagram of the 8421 code to decimal code converter constructed
from AND-NOT logical elements is presented in Figure 5-159. .
- The functional diagram of the Grey code to 842 1 code converter constructed from
AIvD-NOT, AND-OR-NOT logical elements is presented in Figure 5-160.
The functional diagram of the decimal code to .7ohnson code converter constructed
from AND-NOT logical elements is presented in Figure 5-161.
The .functional diagram of the Johnson code to decimal code converter constructed
from AND-NOT logical elements is presented in Figure 5-162.
The functional diagram of the four-bit Grey code to binary four-bit code using
the K155IM1 microcircuit is presented in Figure 5-163.
It is possible to execute.the series-parallel converters.from the K155IR1 type
IC (Figure 5-164). The positive start pulse at the input A and the inp ut cycle
at the input CZ set the register to the 0000000 state: Then in the shift cycle
(input C1) the information is entered in 7-bit words. The information in the
form of a"1" which was first entered in the first bit of the register is shifted
to the end of the register in this case. After the set of cycle pulse the
"operating mode" input (V2 input) of the register is switched through the K155LR1
microcircuit (OR cell), after which the output triggers can~again be initialized
to 0000000.
As a result of the possibility of parallel input, the K155IR1 type shift register
can be used as a parallel-series conve.rter. Figure 5-165 shows a converter for
7-hit words. T.� the register is first filled, then it is necessary to feed
logical zero voltage to the input A("start") of the converter to set the K155IR1
microcircuit to parallel input.
150
- ~
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APPROVED FOR RELEASE: 2047/02/09: CIA-RDP82-00850R000404040027-4
FOR OFFIC'IAL USE ON1,,Y
8 &
X, ' yi
X~
xZ &
R Yz
~
Xi
- &
XJ
X,~ g & ?'a
~ &
- 8 ~~r
_ $
8 � 8 YS
~
Xy ' - 8
X Ys
w
- & y,
Figure 5-153. 2421 code to 7-position binary-decimal code converter
ecw- KoA qq21 CCMNf103N1(IIOHH6III J(UON4H0�f~CCNTN4HNIi
('i) NoA
TH 4-
H8A
_ 4x~Pa x~ x~ I x~ I at Nt I Ni I No N~ I N~ I d~ Uf
0 I 0 I 0 I p I p I p I p I 1 I 0 I 0 I 0 I 0
' I O I O I 0 I' I' I' I' I O I O I I I'
~ I p I p I 1 I p I p I 1 I 0 I 0 I I I 0 I 0
. a I o I o I i ~ t ~ o I t I o I o I o~ o I i
~ 4 I p I ~ I p I p I ~ I p I 0 I 0 I 0 I i I 1
B I 1 I 0 I 1 I I I 0 I 0 I 0 I I I U I r I .
g I ~ I ~ I p I p I p I 0 I 0 I 1 I 0 I 0 I 0
7 I? I~ I~ I~ I ~ I~ I~ I ~ I~ I~ I~
8 ~~~~~~,~~~,~~~~,~~~~~~~o
9 ~,~,~,~,~~~~o~o~o~o~o~~
Key:
1. Decimal niunber
2, 2421 code
3. 7-position b.inary-decimal code
151
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FOR OFFI('IAL U~I~, l)NI.Y
i
X~ $ ~
8 g ~ '
~
~
XZ ~
Xt ~ g yZ ~
. g !
Xw & ;
. & da ~
i
xz 8
& & y~
X3 ,
8 ~ YS
x, 8 � 8 ' y
s ,
8 y~
- Figure 5-154. 8421 code to 7-position binary-decimal code converter '
A ~P- Ko,q 8421 ~MNn03NyN0111IWA j~BON4110�j(CCATHqi1NA
TH 4� 3 K~A
118fI
u~~~Pe x~ I x~ x~ x~ Ui I di I U~ I Y~ N~ I N~ I N~ ,
~ I ~ I 0 I I ~ I 0 I ~ I ~ I 0 I ~ I ~ I ~ ~
I I 0 I 0 I 0 I i I 1 I I I I I 0 I 0 I I I I
a I o I o I i I o I o I i I o I o ~ I� I o ,
3 I 0 I 0 I 1 I I I 0 I 1 I 0 I 0 I 0 I.0 I I
~ I 0 I I I 0 I 0 f I I 0 I 0 I 0 I 0 I I I i
. g I 0( I ~ I ~ I ~ I o I ~ I ~ I ~ I Q I ~
s I o I i I i I o I o I o I o I i I ol o~ n
~ I o+ i ~ i I t I o I i I i I o ~ o ~ ~ I i .
s I i I o ~ o I o I o I o I o ~ o I o I o I o
9 I I I 0 I 0 I 1 I 0 I 0 I 0 I 0 I 0 I 0 I I
Key:
1. Decimal numher
2. 8421 code
3. 7-position binary-decimal code.
152
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APPROVED FOR RELEASE: 2007/02109: CIA-RDP82-00850R400440040027-4
' ~ FOR OFFICIAL USE ONLY
fx, r,
X1 Y1 ,
X
1 XZ
E 8 YZ Xy 8
x~, I 8 Y2
8 X2
Xy 8
X ~ 8 8. Y3 .
X3 X3 $
^3 8 8 Yu 8 Y3
I X3 &
Xy 1
8 ~ 8 8 1'4
Figure 5-155. 8421 code to 2421 code Figure 5-I56. 2421 code to 8421 code
con verter converter
1,~~ (2ko~ sa:i ~3kou zasi ~1~
oA 2�121 ~Kq~q 8121
A
s ~ a ~ i N~ Ne N: Ui a'~
n.. ~ X I X I X I X I I I a~~ X~ I x, I X, x~ d, l u. l u~ l d~
I ol o I nl o I o I o I ol o ~ I o Iol ~I oI ol ol ~lo
~ I~ I ~ I ~ I ~ I n I ~ I ~ I I 1( o I 0 I Q I I I 0 I 0 I 0 I I
2 I O I 0 I ~ I ~ I ~ I 0 I ~ I ~
3 I OI 0I I I I I UI 0I ~ I ~ 4 I 0) OI IIOIOIOI II0
3 I 0 I O I 1 I I I O I O I i I I
4 I O I I I O I O I O I I~ O I 0
4 I 0 I 1 I O I O I OI 1 I OI 0
A I n I 1 I 0 I I I I I 0 I I I I
b I IIOIIIIIOIIIOII
G I OI 1 I I I 0 I I I I I 0 I 0 , I~ I~ I~ I~ I~I ~ I~ I ~
~~~~~~~~~~~i~~~~~
7 I ~I~Inlilolllil~
K I~ I p I ~ I ~ I ~ I I I I I n
8 I IIIIIIOIIIOIUIO
y I ~ I ~ I ~ I ~ I ~ i ~ I ~ I ~
9 I I I I I I I I I I I OI OI 1
Key: Key:
1. Decimal number 1. Decimal number
2. 8421 code 2. 2421 code
3. 2421 code 3. 8421 code
' Here the logical ze~ro level is entered simultaneously in the first bit of the
register. Then it is possible to produce a series shift of the information in
' which the freed bits of the register are ~filled with logical one, the K155LA2
microcircuit responds which switches tfie register from the "shift" mode to'the
"input" mode, as a result of which the register can take new inforn~ation on the
next cycle pulse.
153
FO~t OFFICIAL USE ONLY
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APPROVED FOR RELEASE: 2007/02/49: CIA-RDP82-00850R040400040027-4
FoR oFFicini~ USE UNLY
X1 8 g
'XZ
g g Y1 $ A I
X2 g A
8
g 8 e
X3 ~ �
,Y3 8 2 6 B
X4 g Y2 3
$ C
X4 8 ~ $ ~
8 8 Y3 ~ D. ~
8 8
9 g. D
XS g & Y~
Figure 5-157. Johnson code to 8421 Figure 5-158. Decimal code to binary-
code converter decimal 8421 code converter
1~ 2(oA A~oxcoua oA 8471
�a ~Ti
, Ko~ D C B A
u~$ I I I I I I T114�
k1F ~ x' x. X, Xi xi N~ N~ N~ N~ xdq 8 ~ 4 1
0 I O I O I O I O I U I U I ~ I U I ~
0 I 0 I 0 0 I 0
1 IpI0l0l0lil0l0l011
. I I 0( 0 0 I 1
z I o I o I O I I I' I 0 I o I I I o .
4( 0 I 0 I I I 0
3 I p I p I I I 1 I I( 0 I O I i( I
3 I 0 I 0 I 1~ 1
4 Ipl I+II ll IIOI IIOIO
4 I 0 I I I 0 I 0�
5 I~ I~ I~ I~ I~ I~ I ~ I~ I I 6 I 0 I 1 I 0 I 1
B I I I i I 1 I i I 0 I 0 I I I i I 0
6( 0 I I I 1 I 0
1 I ~ I ~ I ~ I 0( 0 I 0 I I I I I I
1 I 0 I I( I I 1
~ lililolololil.o~o~n
e I i I o I o I o
9 I I I p I p I OI 0I 1 I OI OI 1
9 I I I 0 I 0 I I
Key: Key:
1. Decimal ntmiber 1. Decimal code
2. Johnson code
3. 8421 code
154
FOR OFFICIAL USE ONLY
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APPROVED FOR RELEASE: 2007/02/09: CIA-RDP82-00850R000400040027-4
~ - FUR OFFI('IA1. USM: ONLY
8 0 Ko,4 D C B A
= AecA� _
TN4�
IIW~ 8 ~ Z ~
8
B ~ ~ I ~ ~ o I~
D
g Z I I o I o I o I 1
~
; ~ z I o I n I ~ I o
8 3
~ o ~ o I i I i �
e g y a I� I i I o I o
B 5 I p I ~ I 0 I ~
, $ S
6 I 0 I I I 1 I 0
A 8 s 7 I 0 I~ I~ I~
A
_ ' 8 I~ I~ I~ I~
8 7 g I ~ I p I o I t
$ 8
8 ' 0
~ Figure 5-159. 8421 code-to-decimal code converter
~ Key:
1. Decimal code
Counters. The functional diagram of a four-bit counter (Figure 5-166) is
constructed on the basis of a memory element with four stable states and RS-
trigger. The initial state is set by feeding a logical one signal to the bus R
' at T=O. The functioning of the four-bit counter is explained by the truth table
presented in the figure.
' The duration of the count pulse of the initializing signal and the interval
between count pulses must not be less than 2tdel,p,mean�
The functional diagram of a four-bit counter with Grey code is depicted in
Figure 5-167.
I' The variation of the output signals of the counter takes place by the count pulse
(T=1). It is necessary to initialize by feeding the logical z~ro signal to the
bus R ("set 0") .
The duration of the count pulses, the intervals between count pulses and initiali-
- zation must not L~e less than 2tdel,p,mean� The operation of the counter is
described by the truth table (Figure 5-167).
The �unctional diagram of an 8-tiit counter w3th Johnson r.ode constructed on the
basis of the AND-OR-NOT PC is presented in Figure 5-168.
The functional diagram of an n-liit counter with ~rey code converter based on half-
adders constructed f rom K155TM2 and K155LP5 microcircuits is presented in
Figure 5-169. ~
155
FOR OFFICIAL USE ONLY
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APPROVED FOR RELEASE: 2007/02/09: CIA-RDP82-00850R000400040027-4
H(.)R OHFI('IAI. UtiH: ONI.Y
8t
8
8
o I c I B I A Dl I c, B, a, ~
8i 8 .
A~ 0 I 0( 1 I 0 0 I 0 I' 0 I' 0
A 8 8 8 a~
A o I I I t I o o I o I o I� i
8
o I I I I I I o I o I t I o
B ~ E~ B~ o I 1 I o( I o I 0 ~ I I I
~ 8 � 8 B~ o I I I o I 0~ o I I I o I o
~ 8 f 1 I I I o I o o I I I o I, 1
cf
D g ~ C' I I I I 0 I I 0 I I I I I 0
b . i I i I i I i n I i I i I i
8 Dr
~ 8 I I I I i I o 1 I o I~ o I o
Dt
I I 0 I I I 0 I I 0 I 0 I, I
Figure 5-160. Grey code to 8421 binary-decimal code converter
The functional diagram for the connection of the K155IYe6 and K155IYe7 micro-
circuits with an increase in word length of the counters is presented in Fig 5-170.
If the counter circuit is used as a frequency divider without para11e1 Pntering
of the information, the inputs D1, D2, D4 and D8 must be "grounded," and a logical
one voltage fed to the input C.
The functional diagrams of asynchronous summing counters based on JK and D-triggers
and their operating time diagram are p.resented in Figures 5-171 to 5-174. If the
counting inputs of the triggers after subsequent bits are connected to the outPuts
of the Q preceding bits for the ~ounters b ased on JK-triggers and with output Q for
the counters based on D-triggers, subtracting counters are obtained.
If the counter state is read after each input pulse, the maximum count frequency
for the series counter is determined by the smallest number of the values of
tcount, max in accordance with the expressions:
fcount, max - Fcount, max'
1
fcount, max (n-1)t +t ~
del,p ~esp
where ~co~nt max is the maximimi count frequency of the trigger; n is the number
of bits o t~ie counter; tdel is the propagation delay time on connection for
counters based on JK-tri~gers and disconnection for counters based on D-triggers;
tresp is the response time of the external read circuit.
156
, ~
APPROVED FOR RELEASE: 2007/02/09: CIA-RDP82-00850R000400040027-4

APPROVED FOR RELEASE: 2007/02/09: CIA-RDP82-00850R000400040027-4
FOR OFFICIAL USF: ONI.Y
' 's .
~ A
, 3 g A
5 I E I U ( C I B I A
6 g
7
, 8 B p I o I o I ~ ( ~ I o
3
8
B 1 I o I 0 I o I o I I
" 8 4 I 0 I 0 I 0 ( I I I
~ 3 I 0 I 0 I 1 I I I I
8 4 I 0 I I I 1 I I I I
8 . 6 I ' I ~ I I I f I I
D
8 ~ I~ I~ I~ I~ I~
� D
. 7 I I I I I I I 0' 0
8
E 8 I 1 I 1 I 0 I o I o
. 8 I ~ I ~ I ~ I 0 I 0
~
Figure 5-161. Decimal code to Johnson code converter
As a result of nonsimultaneous switctiing of the triggers of the counter with
series carry on interrogation of its states false signals appear at the decoder
output; therefore a gating signal must be fed to the decoder input.
The construction of an asynchronous counter based on JK-triggers is unreasonable
in a ntunber of cases, for the counters based on JK-triggers by comparison with
the counters based on I~triggers have large equipment losses and slow speed.
In order to vary the count factor of asynchronous counters it is possible to use
the inputs of the R and S triggers. The functional diagram and the operating
time diagram of a mod 10 asynchronous counter are presented in Figures 5-175 and
5-176. ~
In the general.case in order to obtain a mod K counter signals are fed to the IC
input from the Q-bit outputs in the logical one state on the count K-1. The
output D5 is connected to the input S of the remaining bits.
The f.unctional diagram and the operating time diagram of an asynchronous mod 20
counter are presented in Figures 5-177, 5-178. The tri~ger based on the micro-
circuits D6,~ is introduced to increase the negative pulse duration of the
_ input of the R-triggers.
In order to obtain a mod K eounter, the outputs Q of the bits in the logical one
state on the count K are connected to the inputs of the roicrocircuit D~, and a
signal is fed to the input R of these bits from the output of the microcircuit
D6.
157
FOR OFFIC[AL USE ONLY
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FOR OFFICIAL USH: ONI.Y
A ~0
A U
s ~
a
e
~ g Z I E I D C I B A
C
8 d p I 0 I 0 I 0 I 0 I 0
D
D ~ I p I p I p I p I I
8 ~
E 2 I o I p I o I ~ I ~ .
E
8 5 3 I 0 I 0 I 1 I I~ I 1
8 6 ~ I ~ I ~ I ~ I ~ I ~
6 I ~ I ~ I 1 I 1 I 1
8 ~ g I 1 ( I I I I 1 I 0
~ ~ I ~ I 1 I I 0 ( 0
8
g I ~ I 1 I 0 I 0 0
8 9 9 I 1 0 0 0 0
Figure 5-162. Johnson code to decimal code converter
The functional diagram and operating time diagram of a mod 12 counter are
presented in Figure 5-179. When the 1100 state is reached the counter halta. For
a repeat count cycle it must be set to "0."
The functional diagram of a synchronous counter with natural halt on a selected
number is presented in Figure 5-180. The inverse code of the number on which the
counter must half is fed to the inputs of the microcircuit D~, D4, D6, D8.
Functional diagrams and operating time diagrams of asynchronous scale-of-ten
counters are presented in Figures 5-181 to 5-186.
The functional diagram of an asynchronous reversible scale-of-ten counter based on
K155TV1 and K15$TV1 trigger microcircuits is presented in Figure 5-187.
.
On addition, a logical zero vultage is fed to the "addition" +1 input, and a
logical one voltage is fed to the "subtraction" -1 input. On subtraction the
logical levels on the "addition" and "subtraction" inputs are switched to the
opposite. On variation of the count voltage, a logical zero voltage must be fed
to the controllin~ input V, and during operation, a logical one voltage.
158
~
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FOR OFFICIAL USE UNLY
D~
A1 SM C~ RG
AZ 8q C2
CZ ~ ~
Ay S ~ V1
ei S uZ 2
6~ 93 D~
By PZ DZ 4
Pp P1 Dy
D g �
8
~ AZ SM B
A3 S Z DZ ,
A4 ~1 RG
B1 S ~2.`~ 1
BZ
g3 ~1
By PE ~2 Z
GZ P1 D1
D 4
2
A1 SM Dy 8
AZ S Bd D8
A3
; Ay
G3 BZ S 1)3 1Jy
~3 pZ 81 81
P1 A 8 8
G By
Figure 5-163. Grey code to binary Figure 5-164. Series-parallel
code converter converter
In devices where high speed is required, it is recoaunended that synchronous
~ counters with parallel carry be used.
For the construction of such counters it is recommended that JK-triggers be used.
In connectian with the limited n~ber of inputs J and K of the JK-t-riggers the
counters with parallel carry without additional logic can contain ::,:.ly four bits.
Therefore with a large niunber of bits the counter is divided into groups of four
bitG each.
The functional diagram of one such group with group carry element is presented in
; Figure 5-188; the operating time diagram is presented in Figure 5-189..
' The maximum count frequency of one group of bits without removal of inforniation is
determined by the maximum count ~requency of an individual JK-trigger.
The functional diagram of a swmning group counter con~tructed .f~rom identical
groups is presented in Figure 5-190. A characte:ristic f.eature of the structure
of the counter is the use o.f parallel carry f~rom the first group to the rest and
ripple-through carry between the high-orde~r bits, heginning with the second.
159
FOR OFFICIAL USE ONLY
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FUR OFFICIAL USE UNLY
D~
C~ 9 C~ RC
8'~2~- ~ 13
1
V
i s ~i Z 12
~ D~ y 11
DZ Dy
Dy . e 10
5 pe 8
DZ
B~~~RC
~13
V~ 2 f2
3 D~ y ~
D
' ~ DyZ 8 f0
De
DJ
A $
Figure 5-165. Parallel-series converter.
D1, D2 K155IR1 microcircuit; D~ K155LA3 microcircuit;
D4 K155LA2 microcircuit .
When implementing the group counter (Figure 5-190) for n>10 additional elements ~
for the formation of parallel carry are needed which must be connected as
illustrated by the dotted lines.
The functional diagram and the operating time diagram of asynchronous reversible
counter with parallel carry are presented in Figures 5-191 and 5-192. The count
direction is determined by the logical level of the controlling input V, the
logical zero level prepares the shaping circuit of the carry from the output Q of
the triggers for realization of simmmation; and the logical one level, from the
, outputs of the Q-trigger for subtraction of the incoming pulses. For exclusion of
failures on reversal of the counter constructed from JK-triggers of the K131
series, the signals on the controlling input must be v~ried with low level at the
input C. The number of bits in the reversible counter is increased by connecting
four-bit groups analogous to Figure 5-190.
160
FOR OFFICIAL USE ONLY
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APPROVED FOR RELEASE: 2007/02/49: CIA-RDP82-00850R040400040027-4
FOR OFFICIAL USE UNLY
! g ' .
8 4~
K
~ 3
' 8 1 8 1
~
8 8 QP
K K
3 3
, T
8 1 g f
- 8 8 Q1
, K K
3 3
i
g 1
8 Q4
, R . 81 K K .
3 3
Figure 5-166. Four-bit counter with unitary coding
tl~ ~ (;ocroam~o nMxoAon {:octosienc ei4xoAon
T1oMen 2) Pa~pnAon IIoMr P A
cpcTOnmrn COCTOfIII11N 47~ f~n~ ~ oe
C4CT411N71 C4fT4HK8
QI ~f I Q~ I~~ QI I Q7 ( Qf I QI
~ I ~ I ~ I ~ I ~ Z I ~ I ~ I ~ I ~
~ I 0 I ~ I I I I 3 I 1 I 1 I p( I
Key:
1. Counter state niunber
2. Bit output state
i
;
161
FOR OFFICIAL USE ONLY
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APPROVED FOR RELEASE: 2447/02/09: CIA-RDP82-44850R444444444427-4
FOR OFFI('IAL USE ONLY ~
_ . ~ I
4as 4a+
4e+ Qot 8 1 8 1
Sf 81 8 8
81 81 81
8 8 8 8 g 81K 3 1K ~
8f 81
3 8 3 g 3 R'
K
T dc, a: aoa 3cw
8! 81 8t 81
81 8f 8f g 81 B 8 8
S 8 d 8 8 8f
K K 1 K N 1 K X
3 3 g 9
9 3
R
Figure 5-167. Four-bit counter with Grey code
~=r~~ r2~ ~ (i~ t2~ c~.~ TZ)
, HOMlp OC70AHH! BdXOA08 HoMep aTOaxxe edxoaoa HoNep COC70ANN! HdXOJ(OB Ho~ep COCTOAHNB BdXOAaB
COC70A� p83PpAOe COCTOA- P89pAA08 ' COCTOA- D89pAQ08 coc7ost� Pa3DAAO8�
NxA QGIIQG2IQG3IQGq HNA QQlIQG2IQa3IQQ4 xxA QQIIQG2IQG3IQG4 xNA QGIIQG2IQG3IQQ4
C9l741JKe CV2T4NK8 Cq2T4NKE C4C74MK8
o i u i o i o; o a i o t i i I o a i u i o i i I? ia ~ o i i I o ~ i
1 I l I U I 0 I 0 I l I 1 I l I 0 9 I ~ I 0 ~ 1 I 1 13 I 1 I I I 0 I 1
Z I ~ I ~ I 0 I 0 6 ~ 1 I U ~ i I 0 10 I I ~ I ~ I ~ 14 I 1 I 0 I ~ I ~
3 I 0 I~ I 0~ 0-~- ~ 0 ~ 0 l I 0 I ~ I I I I I6 ~ 0 ~ 0 ~ 0 I 1
Key: ~
1. Counter state number
2. Bit output state
162
FOR OFFICIAL USE ONLY
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, FOR UFFICIAI. USF: ONLY
81 q~
8
8 ~ Q~
8
`i 4 1 Qz
8
8 1 Q~ g 1 Q 8 1 Qy
8 8 8
~~i
~ 8 1 q~ 8 1 q ~ i ~ 8 1 4~
~ g g t I I 8
; (11
1I~ .
ll~
T 8 ~ Q~
8
R ~
8 1 Qe
8 ~
~ 8f Qe
8
Figure 5-168. Eight-bit counter with Johnson code
~l~ ps ~C Cocrosiunn ewxonoe paspnqoe a= Y COCTOAIIIIA en~xoAon paspstAoe
, ~ f 7 QI I Q! I Q7 I Q~ I Q{ I Q~ I Qf I Q~ ~ M V QI I Qf I Qf I Q{ I Q~ I Q~ ( Q~ Q~
0 I 0 I ~ I ~ I ~ I ~ I ~ I ~ I ~ 9 I ~I ~ I l I ~ I ~ I ~ I ~ I ~
t I ilololololololo io Iolol il il il il ili
_ ~ I ~ I ~ I ol ol ol ol ol o~i IoI oI ol i I~ I i I(I i
~ 3 t~ ~~�~o~o~�~o is Inlololol il il il~;
~ I i I i I i I i I o( o I� I�
13 ~(I I 0 I 0 I 0 I 0 I I I 1 I I
, ~ I ~ I ~ I ~ I ~ I ~ I p I p I p
14 I O I 0 I 0 I n I 11 I 0 I 1( I
li l I I I I I I I I I I I I 0 I U
7 I' I ~ I ~ I' I ~ I ~ I ~ 15 I 0 0I 0 I 0 I U I U I 0I I
~ 8 I ~ I ~ I ~ I ~ I ~ I ~ I ~ I ~ I6 I O I 0 I 0 I 0 I 0 ~ 0 I~~ I ~
; Key:
1. Counter state number
; 2. Bit output state
163
FOR OFFICIAL USE ONLY
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APPROVED FOR RELEASE: 2407/42/09: CIA-RDP82-40850R000400440027-4
FOR OFFI('IAI. USE ONI.Y
aG1 QGZ QG(n-2~ =1 QG(n-1~
X ST Q~ X S T QZX STQ3 X ST Q,,.~X ST Q�
~ r D - D D D D
C Q1 C Q2 C Q3 C Qna C Qn
R R R R R
`R
Figure 5-169. n-bit counter with Grey code converter based on
halfadders
(1)
IloMCp ~2~ COCTOHIINfI nMxonon ~n,~~,no~
cocTOn-
min I
C4CT~IIfNB QGl QG2 I... QGk I QGk-~-1 I... I QG(n-1) I QGn
~
4 0 I ~ I ~ I I ~ I. 0 I I ~ I ~
~ I ~ I Q I I ~ I ~ I I ~ I ~
2 I ~ I ~ I... I ~ I ~ I... I 0 I ~
3 I 0 I i I... I 0 I 0 I... I 0 ` 0 �
.
I I I . I I I I I
~k-2 I 1 I 0 I... I I I 0 I... I 0 I p . ,
ak - ~ I 0 I 0 I... I I I 1 I... I 0 I 0
2k I ~ I 0 I... I 1 I I I... I 0 I 0
I I I... I I I... I I
2�-1- 2 I 1 I 0 I... I 0 I 0 I... I 1 I 0
Zn-1- i I 0 I 0 I... I 0 I 0 I... I 1 I 0
2n-i I p I 0 I... I 0 I 0 I... I I I 1
_ I . . I I I I I I I
~�-a I I ( 0 I... I (1 I 0 I... I 0 I l
i
- yn_~ I p I p I... I 0 I U I... I 0 1
i
Key:
1. Counter state ntnnber
2. Bit output states
The ~.nputs X are connected to a 2.4-4.5 volt dc powe~r supply.
QGk = Qk'+ Qk+~'
~ QGn = Qn:
~2 a 1~ Zi ~ fl~~.
164
FOR OFF[CIAL USE ONLY
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APPROVED FOR RELEASE: 2407/42/09: CIA-RDP82-40850R000400440027-4
1~t)k ON7~1('IA1. Util~: UNI.Y �
fp D~ CT2/ 1 ip
Zp DZ Z ZP
~p Dy
4p DB 4 ~p
C C 8 4p
R R ~9
+1 +1
~ -1 ~0
5p Di CT2 ~ 5p
6p Dy 2 6p
7p Uy
8p DB 4 7p
C 8 8P
R IS p
~ : P
_ Figure 5-170. Connection of counters with an increase in word length
8 TT Q~ ~ TT QZ g TT Q~ 8 TT Qy
~ J J J J
C C C ~ C
8 8 8 8
K K K K
R R R R.
Figure 5-171. Functional diagram of an asynchronous binary counter
C t
Q~ t
QZ t
Q3 t
Qy t
Figure 5-172. Operating time diagram of anasynchronous binary counter
165
FOR OFFICIAL USE ONLY
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APPROVED FOR RELEASE: 2447/02/09: CIA-RDP82-44850R444444444427-4
FUft UFFICIAL USE ONLY
S T Q~ S T QZ S T Q3 S T Qy
C D D D D
C C C r C
R R R R
Figure 5-173. Functional diagram of an asynchronous binary counter
C t
Q~ t
QZ t
Q3 t
Qy t
Figure 5-174. Operating time diagram of an asynchronous binary counter
D1 DZ D,~ Dy
S T7 q~ S TT qZ S TT q3. S TT Qy
8 8 8 g,
~ J J J J
C C C C
& 8 8 8
K K K K
R R R R~
. D5 _ .
8 S
Figure 5-175. Functional diagram of an asynchronous mod 10 counter
C t
Q ~ t,

~ Q2 t
QJ t
Q9 t
~ � t
~ Figure 5-176. Operating time diagram of a mod 10 asynchronous counter
166
FOR OFF[C[AL USE ONLY
APPROVED FOR RELEASE: 2007/02/09: CIA-RDP82-00850R000400040027-4

APPROVED FOR RELEASE: 2407/42/09: CIA-RDP82-40850R000400440027-4
' FOR OFFICIAL USE ONLY
Dt DZ D3 Dy DS
s rr Q~ S TT Qa S TT Q3 S TT 49 S TT QS
8 8 8 8 g
~ J J J J J
� C C C C C
$ g 8 8 8
K K K K ' K
R R R R R
Ds Ds
8 8
�D~ D8
8 8
Figure 5-177. Functional diagram of a mod 20 asynchronous counter
C t
Q~ t
Qz . t
Q3 t
Q9 t
QS t
~ t
Z t
3 t
Figure 5-178. Operating time diagram of an asynchronous mod 20 counter
If the reversible control c{.rcuit is executed in the form of an RS-trigger, the
functional possibillties of the reversible counter are expanded. In this case
' the circuit will have a number of advanta~es:
Switching from addition to subtractian and back can be accomplished by short
pulses;
In addition to the addition and subtraction operations, it will be possible to
per�orm the inversion operation on code entered in the counter, for w~ich it is
necessary to feed low levels to both inputs of the control RS-trigger, and then
the synchronization pulse to the counting input of the counter. (In this case
it is necessary to consider that the 1ow 1evels can be �ed to the input R and S
of the RS-txigger also simultaneously, and picked up only alternately.)
i 167
FOR OFFICIAL USE ONLY
; .
APPROVED FOR RELEASE: 2007/02/09: CIA-RDP82-00850R000400040027-4

APPR~VED FOR RELEASE: 2007102/09: CIA-RDP82-00850R000400040027-4
HOR OFFI('IA1. USH: ONI.Y
~
ST q~ ST qZ ST Q3 ST qy
g~ D D D D
8 C C C C
R R R R
~I~BpPMPHNQA alLQtpQM61d pa6nmer C4@R74(LKa.
~ t
~ t
~--a
Q1 t
q21 t
,
Q3 t
Q4 t
Figure 5-179. Asynchronous mod,12 counter with natural halt
Key:
1. Operating time diagram of the counter
Q1
Q2
. Q3
.
' 2o D,~ 2~ Dy 22 Ds 23 D8
1 1 9 1
- Q9
D~ D2 D3 Ds D~
8 1 S T S T S T S T
~ D D D D �
C C C C
~ 8 R R R R
r~
Figure 5-180. Functional diagram of an asynchronous binary counter
with natiiral half on a aelected number
The speed of multibit counters with parallel ca.rry, including reversible counters,
can be increased by introducing an addit3on a1 carYy trigger in the first group
of bits as sfi awn in Figure 5-193. Here the delay in the carry shaping circ.-ait
is excluded, for the rarry trigger is switcfied synchronously with the triggers
in tlie counter 6its. The connection of the first group of bits to the subsequent
ones is the same as in Figure 5-190.
168
FOR OFFICIAL USE ONLY
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APPROVED FOR RELEASE: 2007/02/09: CIA-RDP82-00850R000400040027-4
' FOR OFFIC'IAI. USF; ONI..Y
S TT S TT S TT S TT
8 Q~ 8 Qa 8 8 Qy
~ J J T Q3 J .
C C C ~
8 8 8 g
K K K K
R R R R
Figure 5-181. Eunctional diagram of an asynchronous summing scale-
~ of-ten coimter
1 2 3 4 5 6 7 8 9 10 11
C t
Q~ t
Qa t
QJ t
_ Qq t
Figure 5-182. Operating time diagram of an asynchronous summing
scale-of-ten counter
S 7T Q~ S TT qy S TT q3 S TT qy ~
8 8 g &
~ J J J ~
C C ~ C
, 8 8 8 8
H K K K g
- R . R R R
Figure 5-183. Functional diagram of an asynchronous subtracting
scale-of-ten counter
The functional.diagrams and operating~time diagrams of synch.ronons counters
- ~or 3, 4, 5, 6, 7, 9, 10, 11, 12, 13 based on the JK and I~ triggers of the
K131, K155, K158 series microcircuits are presented in Figures 5-194 to 5-207.
169
FOR OFFIC[AL USE ONLY
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APPROVED FOR RELEASE: 2007/02/09: CIA-RDP82-00854R000440040027-4
' N'OR ()FH'll'IA1, lltil~: ()NI,Y
- 1 2 3 4 5 6 7 8 9 10 11
~C ~
� . Q~ t
~ I t
Qz'
Q3 ' t
Q4 t
Figu~e 5-1$4. Operating.time diagram of an asynchronous subracting
scale-of-ten counter
QT
QQ
9�
Q3
ST $1 ST ST $ ST Qy
D D D D
C ~ g ~ ~ ~
R R R R
R
Figure 5-185. Functional diagram of an asynchronous subtracting
scale-of-ten counter
0 2 3 4 5 6 7 8 9 10 t
C
Q1 t
Q~ t,
Qz .
Qz r`
Q3 . t
Q3 ~
Qy t
~
Q4 y
DZ t
D4 ~
Figure 5-186. Operating time diagxam of an asynchronous subtracting
scale-of-ten counter
170
FOR OF'FICIAL USE ONLY '
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APPROVED FOR RELEASE: 2007/02/09: CIA-RDP82-00850R000400040027-4
~ FOR OFFICIAI. USH: UNLY
g &
+1
- V ~
STT STT S7T 81 STT
8 8 g g
~ ~ J ,T ~ g J
g 8 1 g 8 1 g 8 g 8 1
~ g ~ 8 K P ~P~
K
R. 8 R 8
.
Figure 5-187. Functional diagram of an asynchronous reversible
scale-of-ten counter
Qt
Qa
~ Qa
S TT S TT S TT S TT
Q4 .
8 8 8 8
J J J J
; ~ C C C
, 8 ~ 8 8 g . .
K K N K
, R R 8 R
~
T' 8 1 8
8 P
, ~ 8 8 p
Figure 5-188. Functional diagram of s,ynchronous binary coiintery
with parallel carry
171 '
~ FOR OFFICIAL LiSE ONLY
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FOR OFFICIAL USE ONLY
~
C t
Q~ t
Q2 t
Qd ' t .
Q4 t
P t
~
Figu~e 5- 189. Operat ing time diagram of synchronous binazy
counter with parallel carry
C
( 8 C72 1 8 CT2 1 g CTZ 9
~ Z ~ 2 ~ 2
T y T y r 4
B ~ 8 8
P~
. 8 8 pi $ p~
P~ Pi
I ~ I I P3
~i~~ . .
~i~ 8
i I ` P~
~L_
Figure 5-190. Functional diagram of a.s~unming group counter
A distinguishing feature o� synchronous coun'ters with parallel ~arry is reduction
of the load capacity of the trigger output as a result of their use for the organ-
ization of parallel carry. ~
The functional diagram and operating time dia~ram of a counter witli parallel-series
carry are presented in Figures 5-208, 5-209.
The given counter occupies an intermediate position between the counters with
series and parallel carry, retaining the high~load capacity of the outputs and
simp licity of layout of the circuit characteristic of a counter with series carry.
172
FOR OFF[C[AL USE ONLY
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APPROVED FOR RELEASE: 2047/42/49: CIA-RDP82-00850R400400440027-4
FOR OFFICIAL USF: ONLY
a+ Qa Qa 4~
v
, s
S TT S TT S TT S TT
8 81 ~ 81 J 81 ~ 81
~ g 8 g 8 ~ 8 ~ 8
K K K K
T - g~ R R R R
~ 8 8
V~ 8
g P
P
Figure 5-191. Functional diagram of a synchronous binary reversible
counter with parallel carry
~ t
' V t
4~ t
Qa t
4a t
44 t
P t
Figure 5-192. Operating time diagram of a synchronous binary
reversible counter with parallel carry
, The maximum counting frequency of such counters is determined by the formula
~count, max Presented on p 156; in the Riven case n is the number of series-
c.onnectt~d ~roups o.f bits of the counter.
173
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APPROVED FOR RELEASE: 2447/02/09: CIA-RDP82-44850R444444444427-4
FOR OFFI('IA1. USP: ONI.Y
, 5 TT Qi ~S TT Qz S TT Q3 . S TT Q9 ~
8 8 8 g
J. J J J ,
C C
8 $ g $
K K K K ~
81 R R R R
C $ 8 ~ '
S TT
8
J'
C
.g
K P
R R
~ Figure 5-193. Counter with parallel carry and group parallel carry
memory trigger. Electrical~functional diagram.
Q~
STT STT ~ 2 3 4 5
8 8 Q2 C t
C C t
Q~
8 g t
K K Qz
R R b)
C a) '
Figure 5-194. Functional diagram (a) and aperating time diagram (b)
of a mod 3 counter ~ '
C ' t
_ 5 T q1 S T 42 Q1 t
8 D~ D D Q' t
C Q~ ~ 42 QZ t
R R QZ t
C D~ t
a~ b )
k'igure 5-195. Functional diagram (a) and operating time diagram (b)
of a mod 4 counter
174
' ; ONLY
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APPROVED FOR RELEASE: 2007/02/49: CIA-RDP82-00850R040400040027-4
i FOR OFFIC'IA1. USE ONLY
~
41
~ Q2
S TT S ~T S TT Z 3 4 5 t
8 8 ' 8 Q3
; J J J Q~ t
~ C C C
~ 8 8 8 Qp t
K K K
R R R a3 t
~ a~ b )
Figure 5-196. Functional diagram (a) and operating time diagram (b)
of a mod 5 counter
~ R1
Q2
' ST ST ST q3
S D1 ~ D 8 D3 D
~ a~ ~ a2. ~ Q3
R R R
~ C P
Q~
' ~ ~
Q~ t
Q~ . t
Q2 ~
, QZ t
Q3 t
~ 43 t -
D~ ,
; D3 t
' h)
Figure 5-197. Functional diagram (a) and operating time diagram (b)
' of a mod 5 counter
' The functiona.l diagram of a synchronous scale-o~-ten reversible counter operating
; in binary-decimal code with addition o~ the number 6 a;~'ter the r.ode 1001 is
~ presented in Figure 5-210.
i
; During direct counting after the 1001 code, by the next ~ountable signal the first
and fourth bits of the decade are switched to "0," and by the zero signal P~
the blor.kinK of the second bit is realized. During reverse counting after the
0000 code by the next rountable signal the first and fourth bits of the decade
are switched to "1," and by the ze~ro signal PB the switching of the second and
third bits is blocked. 175
; - FOR OFFICIAL USE ONLY
i
APPROVED FOR RELEASE: 2007/02/09: CIA-RDP82-00850R000400040027-4

APPROVED FOR RELEASE: 2007/02/09: CIA-RDP82-00850R000400040027-4
F'OR UN'H'I('IAI. USN: UNLY
R~
4i S 6! 2 3 4 5 fi
C t
STT S77 STT t
8 8 8 Q3 Rt
J J J ~2 t
C C C
8 8 8 Q3 t
K K K
R R R b~
C a.~
Figure 5-198. Functional diagram (a) and operating time diagram (b)
of a mod 6 counter
g Q1
Q2
S TT S TT S TT Q,~ ~ 2~~ 5 6 7~
8 8 8 a~ t
C C ~ 'qZ 't
8 g g
K K K q3 � t
R R R ~ b~
C
, g . d~
Figure 5-199. Functional diagram (a) and operating time diagram (b)
of a mod 7 counter
S TT Q~ S TT 'QZ S TT Q3 S~T Qq
' g , g 8 8
J J J J
~ C C C
8 8 8 $
i( K K K
R R R R
C
Figure 5-200. Functional diagram of a mod 9 counter
Revexsing a counter constructed from JK--trigge~.rs of the K131 series is possible
only at low level on the c.ounting input.
The functianal circuit diagram of four-bit groups is presented in Figure 5-211.
176
r
APPROVED FOR RELEASE: 2007/02/09: CIA-RDP82-00850R000400040027-4

APPROVED FOR RELEASE: 2007/02109: CIA-RDP82-00850R400440040027-4
- FOR OFFICIAI. USE ONLY
Q~
QZ
~ Q3
S TT S TT S TT S TT
8 8 8 8 4~
, ~ J J J
~ ~ C C C
8 8 8 8
K K K K
~ R R R R
~ C
Figure 5-201. Functional diagram of a synchronous summing scale-
of-ten counter
~ t
Q~ t
QZ t
Q3 t
Q4 ~ t .
Figure 5-202. Operating time diagram of a synchronous summing
scale-of-ten counter
~
! S TT q~ S TT QZ S 7T Q3 S TT Qy
8 8 8 8
J J J J
C C C C
8 8 8 8
' K K J J
; R R R R $
~
~ ~
~
Figuxe 5-203. Functional diagram of a synchronous subtracting
scale-of-ten rounter
, 177.
FOR OF~[CIAL USE ONLY
i
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APPROVED FOR RELEASE: 2007/02/09: CIA-RDP82-00850R000400040027-4
FOR ONFICIAL USE ONLY
~ t
q~ t ~
Qa t
Q~ t
Q4 t
Figure 5-204. Operabing time diagram of a synchronous subtractin~
s~.ale-of-ten counter
S TT Q1 S TT QZ S TT Q~ S TT Qy
- 8 8 8 8
J T J J
- C C C C
R 8 g 8
K K K K .
R R R R
8 8
C
Figure 5-205. Functional diagram of a mod 11 counter
S TT Q~ S TT qZ S TT q~ - S TT qy
8 8 8 8
J J J J
C C C C
8 8 8 8
_ K K K K
" R R R R
C
Figure 5-206. Functional diagram of a mod 12 counter
.
The functional diagram and operating time diagram of a synchronous scale-nf-ten
counter with parallel carry are presented in Figiire 5-212.
178
FOI~ OFFICIAL USE O '
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APPROVED FOR RELEASE: 2007/02/09: CIA-RDP82-00854R004400040027-4
1~()R ()I~1~1('IAI. Iltil~: ()NI.Y
5 TT Q~ S 1T qZ S TT q~ S TT Qy
8 8 8 8
J J J J
C C C ~
g $ g 8
K K K K
R R R .R
8 g 8
C
Figure 5-207. Functional diagram of a mod 13 counter
4~
Qz
Q3
S T1 S TT S TT S TT
8 Qy
8 8 g .
C 'T J J J
~ ~ C ' C
g g 8 g
K K X K
R R R R
- Figure 5-208. Functional diagram of a binary counter with parallel-
series carry
1 Z 3 9 5 6 7 8 9 10
C t
R~ t
4a t
Q3 t
Qy t
Figure 5-209. Operating time diagram of a binary counter with
parallel-series c~arry
179
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APPROVED FOR RELEASE: 2007/02/09: CIA-RDP82-00850R000400040027-4
FOR OFFICIAL USH; ONLY
a~
; 1l Q~ S TT Qp 5 IT Qj S 1T Q~
- F 8 8 8
~ g 1 J 8 9 J g 1 J
~ C C C
~ Z 8 K g 8 8
x K X K
R R R R
7a
Tc ~ 1 & ?B
c~ 8 R ~ Pa
Cr 8 -
fc
8 ~ P
c
Figure 5-210. Functional diagram of a synchronous scale-of-ten
reversible counter
1 8~ 1 8 CTfO 1
8 G710 1 C1
C~ C~
8 2 8. 2 8 2
' CZ ~2 .
TB 4 TB y rg 4
Tg 8 Tt 8 r~ 8
$ Pe~ 8 Pe~ g pe
Pc1
$ PC~ PB1
8, Pc2 ~ Pc
+1
Figure 5-211. Fnnctional diagram of a reversible group sc.ale-of-ten
counter
The functional diagram of a synchronous reversihle counter with �ripple-through
r.arry is presented in Figure 5-213. Qn addition it is necessary to feed a logi-
cal one voltage to the "addition" input +1 and a logical zero voltage to the
"subtraction" input -l. On subtraction the logir.al levels are switched to the
oppasite.
180
' )FFICIAL USE ONLY
APPROVED FOR RELEASE: 2007/02/09: CIA-RDP82-00850R000400040027-4

APPROVED FOR RELEASE: 2007/02/09: CIA-RDP82-00854R000440040027-4
I~UR ON'H'I('IAL USE ONI.,Y
S T Q~ S T QZ S T Q3 S T Qy
D D D D
C Q1 C QZ ~ Q3 C Q4
R R R R
1 2 3 8 1 4
8 8 8~
8
n .
~ t
- ~ t
Q~ t .
Z t
Q2 t
3 t
Q3 . t
4 t
Qy t
)
Figure 5-212. Functional diagram (a) and operating time diagram (b)
of a synchronous scale-of-ten counter with para11e1 carry
The counter with variable counting factor performs the function of cotmting
cycle pulses with given division factor K of the cycle pulse frequency. The
functional diagram and operating time diagram of a counter with variable counting
factor are presented in Figures 5-214, 5-215. For the 1111 code and high voltage
level at the counting input C negative and positive output pulses are formed
on tl~e outputs Q5 and Q6. The positi~ve output pulse interrogates the input
elements AND-NOT, to which the control is fed in binary code. Here the signals
confirming the setting to "1" reach the inputs S of the bits which have the
"1" code in the controlling signal.
The counting factor is:
K = 16-N
where N is the decimal equivalent of the bina ry code reaching the AND-NOT
input elements.
:181
FOR OFF[CIAL USE ONLY
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APPROVED FOR RELEASE: 2447/02/09: CIA-RDP82-44850R444444444427-4
FOR OFFICIAL USE ONLY
Q~
QZ
-1 QS
81
ST 81 ST ST g~
D P
~ ~ 8 ~ g ~ 8
R R R
1 1
C
Figure,5-213. Functional diagram of a synchronous reversible
counter with ripple-through carry
With an increase in the ntanber of bits it is necessary to retain the parallel
carry and increase the number of input elements ANI}-NOT on which the code 11...1
i~ assembled.
The baGis for the shifting counter is a series register.
For construction of shifting counters it is recommended that registers based on
D-triggers be used as the most economical.
The co~non characteristic of the circuits of this class is the presence of feedback
from the outputs of the shift register to its series input.
The simplest shift counter is presented in Figure 5-216.
Feedback is introduced from the output Qn of the last bit. The counter has n states,
where n is the number of bits.
The operation of the counter i$ based on series copying of the "1" or "0" code from
the low-order bit to the high-order bit, that is, the counter state is determined
by the location of the "1" or "0" code.
Counters with a numher of states K=n have 2n--n unused states. Such counters
require preliminary setting and periodic removal of the unused states.
The functional diagrani of a co~ter with more camplex feedback which provides for
transition to the state with one one in the bits after a maximum of four inplit
pulses is presented in Figure 5-217.
If the feedback in tlie shift counter is introduced f~rom the output Q of the last
bit, the number of states of the counter increases to 2n. The .functional diagram
of this counter j.s presented in Figure 5-218. For decoding the counter state it
is necessary to have 2n two-input AND elements, the inputs of which are connected
182
FOR OFFICIAL USE OI+ILY
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APPROVED FOR RELEASE: 2407/42/09: CIA-RDP82-40850R000400440027-4
FUR OFFICIAL USE ONLY
2~
8
22
g S TT 41 S TT QZ S TT 43 S TT Q~f
2~
8 8 ~8 8 8
J J J J
Z~ g' C C C C
8 8 8 8
~ K K K X
.R R R R
QS
$ 8 R6 '
Figure 5-214. Functional diagram of the oounter with variable
counting factor
� ~ t
Q~ t
Q2 t
Q3 t
Q4 t
Q6 t
Figure 5-215. Operating time diagram oi a counter with variab le
counting factor (K=12). .
' S T Q1 S T QZ S T Qn-1 S T Qn
D D D D
C C C C
R R R R
C
S
Figure 5-216. Functiona.l d.iagxam of a shift counter with K=n.
_ to the outputs Q and Q of the ad~acent bits. The states of the shift counter
with 2n states ar.e p.resented in tliP table tu Figure 5-220, and it is indicated
which pairs of outputs must be fed to the input of the AND element. Figure 5-218
demonstrate~ how it is possible to realize decoding of n states of the counter,
using the OR-NOT elements. The dec~ding of the remaining states is carried out
analogously. 183
FOR OFFCCIAL USE ONLY
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FOR OFFICIAI. USF ONLY
8
S T S T S T S T
D D D D
C C C C
R R R R
_ ~ ,
Figure 5-217. Functional diagram of a self-restoring shift counter
1 0 1 1 ~ n-~
S T Q1 S T S T Qn-1 S T Q~
D D QZ D D
C C C C Q~
~
R R R R
Figure 5-218. Functional diagram of a shift counter with K=2n.
8
t~
S TT Q1 '
B
J S T Q2 S T Qn
C
g ~ D D
. K C C
R R R
C 1
Figure 5-219. Functional diagram of a self-restoring shift r.oiinter
with K=2n.
184
F~R OFFICIAL USE ONLY '
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APPROVED FOR RELEASE: 2007/02/09: CIA-RDP82-00850R000400040027-4
FOR OFF[CIAL USE ONLY
Since the shift counter with K~2n uses not all possible 2n states, initial
initialization of the counter is required.
The functional diagram of a self-restoring four-b~t shift counter, the first
bit of which is executed from a JK-trigger, is presented in Figure 5-219.
In the general case for the n-bit counter, it is necessary to feed the inputs
Q with i last bits to the input of the AND element, where i;n/3.
The counters with K=2n can be used in the role of pulse distributors performing
the function of alternate output and negative or positive pulses over separate
channels .
If the states of the counter with K=2n are decoded using the OR-NOT elements
(Figure 5-218), then positive pulses will appear at the output of these elements
with duration equal to the period of the cycle pulses and with a frequency 2ri times
less. The time diagram of the pulse distributor for n=4 is presented in Fig 5-220
(0, 1, 2, 3, 4, 5, 6, 7 are the outputs of the OR-NOT elements).
If the decoding of the counter states with K=2n is realized using the element
' AND-NOT (using the data af the table to Figure 5-220), the negative pulse dis-
tributor is obtained. The time diagram of the negati~ve pulse distributor for
n=4 is presented in Figure 5-221. A characteristic feature of the given pulse
distributor is overlapping of the lawer levels at the outputs of each ad~acent
channel, which is caused by overlapping of the high levels at the outputs of the
D-trigger.
The functional diagram of the n-bit shift counter with K=2n-1 is presented in
Figure 5-222. The counter with K=2n-1 differs from the counter with K=2n only
by the fact that as a result of the presence of feedback through the AND element,
the state Q1=Q2.��Qn_L is forbidden in the counter. The speed of the counter
with K=2n-1 is lower fhan for the shift register as a result of a delay of the
AND element.
The number of states K of the shift counters can be increased to 2n-1 if we use
the "exclusive OR" for feed6ack. Such counters are simpler to design than the
ordinary synchronous counters, for with a large nim~ber of bits they are more
economical.
The feedback equations for shift counters having up to 12 bits are presented in
the table to Figure 5-222.
Inasmuch as the "exclusive OR" 0�unction is equal to "0," the state of all
"0's" is a stable state; there.fore preliminary setting is required. In order
that the counter independently leave the zero state, the feedTaack equa.tion ~nust
be equal to tfiQ logical sum o~ the "exclusive OR" ~unctions and Ql~ 42~ Qn'
Complementing tlie. feedback 1iy elements permitting the required nuQptier of states
to be skipped, it is pos5ible to oFitain a shift coimter with K