JPRS ID: 10607 USSR REPORT CYBERNETICS, COMPUTERS AND AUTOMATION TECHNOLOGY

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• Content Type: REPORTS

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JPRS U10607
23 JuNE 1982
, .
- IJSSR~ Re or~
p
CYBERtvETICS, COMPUTERS AND ~
AUTOMATION TECHNOLOGY ~
(FOUO 13/82)
,
FBIS FOREIGN ~ROADCAST INFORMATION SERVICE
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NOTE
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i aPRS L/10607
23 ~une 1982
_C
t
_i
~ USSR REPORT
~
; CY~ERNETICS, COMPUTERS AND AUTOMATION TECHNOLOGY
(FOUO 13/82) ~
: CONTENTS
~ xaRnwaxE
~ State of the Art and Pro~pecta for IIse of Magnetoiesiative
? and Integrated Heads......, 1
, Intensitg Amplifiers for Optical Instrumenta 5
~ Elektronika B3--19M Calculator I3andbook 8
~ MICROPROCESSORS
i Enhanced-,Speed Microprocessor Sets 13
~
i Structural Organization and Camposition of Microproc~essor.
' Sets 18
~ Programmable 1024-- and 4096--Bit Permanent Storage Units
CPRO~M} 26 _
i
Realizatiun of Computer Hardware on Series R--589 P'~R BIS........ 2~
KR1802 Series Large-~Scale Integrated Circuit Micr.-proc.essor
Set
37
: Cross Microprogramming Syatem for BIS Micxoproceseor Sete.....~. 56
~ HYBRID COMPUTERS
~ Abs�~racts of Articles in Collection 'HYBRID COMPUTER
~ DESIGN' 62
Hybrid Computing Device for Implem~ntation nf Fast Fourier
Transform 67
~
;
i
( ~ - a - [III - USSR - 2].C S&T FOUO~
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Array Computing Devices for Conversion of Numbers From One
Number Syste~ to Another ...........................e.......... 72
Quasianalog Unit for Preprocessor Processing of Speech Signal... 76
Program Control of Equipment in Analog~Digital Data Processing
System 82
Application of Hybrid Computer System With Developed
- Internal Software to Nu~lear Power Plant Simulator............ 87
- Some Design Principles of Scalator Computer Devices of 94
Timer Typ~
SOFTWARE
Program Module Pack for Configuration of Multiproblem Real-
iime Dialogue Systems for M-7000 of ASVT-~'i and SM-1/SM-2
of SM EVM ..............................................o...... 100
Abstracts of Articles in Journal 'PROGRAI~IING'.
Janua;.y--February 1982 102
Software Packages: Methods ~nd Developments.........~.......... 106
- Software Package for Simulating Preprocessing Methods in ~
114
5peech Recognition Syetems
Software Package for Analysis of Stationary Motions of
Mechanic~l Systems........,.�.�������������������������������� 120
Optimization Package Linear Programming Algorithms 122
Modular System for Solving Problems in Aerodynamics and
Dynamics of Flight of Flping Vehicles Aspmptotic Methods..~ 123
APPLICATIONS
Imprcv3ng Assimilation of Computer Capacities 131
Methods of Imprcrving Sector Use of Co~puter Equipment
(Following F.acample of Ukrainian SSR Ministry of
~ 136
Motor Transport)
Development of Organizational and Economft.c Control in Automated
Control~Systems in USSR Ministry of Power and 138
.
Electrir~cation
YeS~-1022 Computers in Automated Contrul Systems 141
Aialogue Facilities Used by Bulgarian Center for Scientific
Information on Medicine and Public Health 144
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~ CONFERENCES AND PERSONALITIES
~
~ Sixth All-Union Scientific and Technical Conference
~ 'Development ~nd Use of Analog and Analog Digital
Computer Equipment' 147
All Union Seminar 'Specialized Parallel Processors for
; Solution of Boundary Value Problems' 152
Role of A. A. Lyapunov in Programming 154
PUBLICATIONS
Index to the Journal 'MEASUREMENTS, CHECKING~ AUTOMATION'
f or 1981 161
J Reversible Models 165

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UDC 681.327.6:681.84.083.82
i
STATE OF THE ART 'AND PROSPECTS FaR USE OF MAGNETORESISTIVE AND INTEGRATED HEADS
Moscow IZMERENIYA, KONTROL', AVTOMATIZATSIYA in Rust~ian No 6, Nov-Dec 81 pp 34-42
[Article by Yu. L. Bogorodskiy, candidate of engineering science, and Ye. F.
_ Korolev, engineer]
~Excerpts] Becau'se of the application of magnetic heads using the design in ques-
tion and the progressive technology for manufacturing them, which provides high
precision in executing the profile of the magnetic heads, a very small gap (about
0.1 - 0.2 micrometer) between the magnetic head ar.d the recording medium has be~n
- obtained. This is especially important for a relatively thin medium, the thickness
of which is comgarable to the gap value j,33]. Using integrated technology enables
achieving unity of the technoiogical base in the mass production of both recording
~ media and magnetic heads. In the process, even in vacuum deposition equipment
series pro~uced by domest~c induaCry [34], obtaining up~to a hundred or more
integrated head~s on one substrate in one processing cycle is attainable.
I
i In addition to a high degree of i~tegration and suita~ility to manufacture of mag-
netic heads, integrated technology enables creating heads with very high reliabili-
ty and very small weight and dimensio~ns. One should rat think however that inte-
grated technology in the immediate future will excl.ude heads with solid mass cor~s
from .application. Preference for application of a particular technology will be
determined for a long time by the various economic factors, taking design innova-
tions into account of course. The fzct is, in particular, that the chief diffi-
culty in manuf acturing solid mass cores--obtaining effective gaps--can be overcome
by various methods. The most progressive of them is changing to helical designs
that permit excluding the ~peration of cutting the gap in ~he rore [35-37].
_ Exampl~s of heads with helical ~xtir_ulazions of half-corea are shown in iig. 10.
The head in fig. l0a consists of two Z
' C-shaped cores 1 and 2. Core 1, made of
, magnetically soft matsrial, has helical
surface :i that fully matches the lower ~ 3
surface of cor~e 2. Face surfa~e 4 of
core 1 has a nonmagnetic film of silicon
- oxide or glass. Its thickness is made ~
eq~i31 to the head gap size. When the ~5 6 ~
upper sectiori is placed on ~he lower and 9
they are rotated toward each other, the a b
face parts of the cores are joined Fig. 10
1
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tightly together, as a result of ~hich a ring magnetic circuit is formed. _The
cores can be metallic or ferrite. The head in fig..lOb consists of two flat plates
5 and 6 which have the shape of an opened ri~g. The rings are curved in a helical
_curve. Compared to previous designs, the advantage of this o;ie is that head.dimen-
- sions in width are not at all restricted and can be made quite small. ~uch a head~
while keeping the advantage of a ring solid mass magnetic circuit9 agproximates
the integrated in its properties.
Area of Application of Integrated Heads. Since magnetic recording has now er_*_ered
into essentially all spheres of human activity and its characteristics are starting
to noticeably affect the rates of scientific and technical progress, it is expected
that the demand for integrated heads will increase. The clearest examples of the
use of the technology of recording on a magnetic medium are the uses of studio
audio and video magn~tic tape recorders in radio and television, astronomy and
astrophysics, space technology and aviation, computer technolo`gy, def ectoscopy,
automation and remote control, measuring technology, etc. [1,~38-40]. The rapid
~ development of electronic c:omputers, automated control systems and data banks
caused an insistent need for development and improvement of storage equipment in
the form of disk, drum and tape units. In these devices, magnetic heads are major
' components, along with the electronics, media and moving mechanisms.
Since these sys~ems operate with digital i:iform3tion, pulse recording methods, re-
quiring the use of pulse magnetic heads, are used in the storage units. Under the
conditions of mass producti~n of them, int~agrated technology is the most preierred,
for the manufacture of the basic elements of large c~omputers 3.s very consistent
with thin-film technology. In the procer~s, because of the rapid wear of integrated
heads when there is contact with the recording medium, they are anplied mainly in
units of h~ads of the floating t;~pe, which ensures noncontact recording.
Integrated technology permits organizing mass output of heads with such high char-
acteristics that this has an immediate effect on the overall characteristics of
the equipment in which they are used ~29, 41]. Thus, for example, the use of inte-
grated heads in disk storage units led to a 2.5-fold reduction in disk diameters
and also a reduction in costs for storing thc intormation coming into the units
j,42]. Media with narrower magnetic tracks, as well as the combined ~esign of a
magnetic head and integrated amplifier for reproduction permit in this case
eliminatir.g a large share of the noise and adjustments.
Extensive possibilities have been onened in measuring technology in connection with
_ the applicat.ion of integr_ated magnetoresistive heads as highly sensitive probes for
- research of magnetic fir~lds. Here they are competitive with Hall sensors. Also
expected is the use of magnetoresistive heads in devices for numeric program control
of inetal-r~utting too?s, where ~1ow-Gensitive heads substantially simplify the
structure of the cont~~l units.
* * ~
Many foreign corporatians and firms are now beginning to seriously consider
magnetoresist~.ve heads and especially their integrated forms. The capital invest-
ment in research to improve the new type of sensors and develop more progressive
manufacturing technology for them is steadily growing. A large number of patents
have appeared for magnetoresistive heads and new technology for deposition and
magnetic electroplating. Considerahle advances are expected in the technology of
recording an~log information by digital methods based on using integrated hea~s,
metallized tapes and integrated amplification technology.
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Introducing thin-film technology into the production of magnetic heads is yielding
- the following advantages:
the frequency response of the "r~cr.rding-reproduction�t path is being improved
because the heads are made in t:ie form of a laminated structure of films with mag-
netic orientation, which provides good flux linkage between the winding and
operating gap,
longitudinal recording density is being increased because ~f the improvement in
the shape (geometry) of thF head magnetic field,
lateral recording density with precise bounds between magnetic ~racks is being
increased,
high head reliability and durability are being achieved because of the structural
integrity, standardized manufacturing technology and application of new materials,
- high suitability to manufacture is being achieved which provides for deposition
of hundreds and thousands of heads in one cycle, and
the cost of the products is declining under the conditions of mass 4utomated head
production.
; Also, the magnetoresistive effect combined with integrated technology makes it
possible to substantially reduce the size and wPight of storage devices while
keeping their high reliability. All these considerations demand a serious attitude
to~aard the development of the new important direction in storage technology and
the performance of profound scientif ic research investigations.
BIBLIOGRAPHY
f 30. USSR Patent 58Q577, "Method of Manufacturing Integrated Magnetic Iieads,"
Tikhonov, A. A.; Filatov, I. N.; Khuletskiy, M. B. and Khamayeva, T. Ye.,
published in B. I. iBulletin of Inventions], No 42, 1977.
! 31. USSR Patent 302747, "Method of Manufacturing Units of Magnetic Heads,"
Timofeyev, B. B.; Taranukha, A. I. and Khishchulc, Yu. A., published in B. I.,
No 15, 1971.
32. USSR Patent 691920, "Method of Manufacturing Integrated Magnetic Heads,"
ityzhkova, I. A.; Spirina, I. A. and Khodzhayev, V. D., published in B. I.,
No 38, 1979.
33. Korolev, Ye. F., "Analysis of Process of Magnetic Recording on Relatively
Thin Medium by (Prysock) Method," ELEKTRICHESTVO, No 9, 1980, pp 66-69.
34. Danilin, B. S., "Vakuumnaya tekhnika v proizvodstve integral'nykh skhem"
~Vacuum Technology in Integrated Circuit Production], Moscow, Energiya, 1972,
256 pages.
35. USSR Patent 57568Q, "Core for Magnetic Head," Bogorodskiy, Yu. L.; Pravikov,
N. A. and Kotova, L. G., published in B. I., No 37, 1977.
36. USSR Patent 687463, "MagnPtic Head," Paukov, Yu. N.; Bogorodskiy, Yu. L. and
Pravikov, N. A., puhlished in I., No 35, 1979.
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- 37. USSR Patent 633065, "Reproducing Magnetic head," Paukov, Yu. N.; Pravikov,
N. A. and Bngorodskiy, Yu. L.,.published in B. I., No 42, 1978.
36. USSR Patent 621128y "Signal Correlation Processing Device," Korolev, Ye. F.
and Kuznetsov, Yu. P., published in B. I., No 31, 1978.
39. GOST jState Standard] 23044-78, "Inflight Voice Recorder Used in ~.vent of
Aviation Accident. Technical.Specifications."
40. Korolev, Ye. F., "Methods of Investigating Relative Losses and Measurement of
- Frequency Response in Magnetic Re~ording Systems," TEKHNIKA KINO Z
TELEVIDENIYA, No 2, 1976, pp 37-40. _
41. Korolev, Ye. F.; Mukhin, Ye. A. and Zhabin, A. S., "Qualitative Indicators of
Video Recording on Magnetic Disk," TEKHNIKA KINO I TELEVIDENIYA, No 3, 1974,
pp 68-64~
42. Manuel, T., "Computers and Peripherals," ELEKTRONIKA [ELECTRONICS], Vol 53,
- No 23 (601), 1980, p 34.
COPYRIGHT: Tsentral'nyy nauchno-issledovatel'skiy institut informatsii i tekhniko-
ekonomicheskikh issledovaniy priborostroyeniya, sredstv avtomatizatsii i sistem
upravleniya (TsNIITEIpriborostroyeniya), 1981
8545
CSO: 1863/96 ~
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UDC 538
INTEN~ITY AMPLIFIERS FOR OPTICAL INSTRUMENTS
- Moscow VESTNIK AKADEMII NAUK SSSR in Russian No 2, Feb 82 pp 66-75
[Article by G. G. Petrash, doctor of physi~al and mathematical sciences]
[Excerpts] The extensive application of amplif iers in optical instruments could
lead to revolutionary transformations in instrument optics. .
There has been recent intensive research on various methods for recovering the
wave front with the aid of nonlinear interactions in various mediums. In some
versions of the method it is possible to recover the wave front through amplification.
As far as is known by the author of this article, these a:uplifying methods have
still not been used in optical instruments. The difficulty in using them is
associated in partj_cular with the fact that extremely high powers are require~i
to effect nonlinear conversions.
. The first laser mircoprojector was built in 1972 in the optical laboratory of the
USSR Academy of Sciences Institute of Physics imeni P.N Lebedev. The amplifying
element of a laser based on copper vapor was used as the amplif ier. Measurements
showed that the amplif ier made it possible to amplify the intensity of light beams
carrying the image of a microscopic object by a factor of several hundred to more
= than 10,000. Maximum amplif ication is achieved with mini~um power for brightening
the object. As the strength of the beam increases the amplifier approaches
saturation and amplif icatian falls off. Here it was passible to use a considerable
part of the energy stored in the amplifying medium. Mean power in the exit beam
from the microprojector was only several times less than in a laser with the satne
= amplifier, at 1.5-2.5 W. This power is adequate to obtain an image of a microscopic
object on a screen measuring 25 sq. meters. When a microscopic ob3ect enlarged
by a factor of eight was used, the linear increase on the screen exceeded 10,000.
These results lie far beyond the possibilities of normal micropro~ectors. H~re
the amplifying element had no marked distortions and the resolution of the instrument
was not impaired.
Late~ other pulsed lasers operating on metal vapors were used as the intensity
amplifier5 in micropro~ectors. It turned out that all the amplifiers tested made
it possible to obtain ~ignif icant and efficient amplification (some characteristics
- are shown in a table). Brightness-intensified images of.a microscopic ob~ect without
, marked distortions were obtained with all amplifiers in various spectral fields. ~
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New models of industrial versions of laser microprojectors for use mainly in
microelectronics, have now been developed. In these ~nstruments provision has
� been made for a facility to employ treatment by a laser b eam focused on an object
in a small spot (down to 1 micro~ter) with continuous monitoring of the treatment
process on a screen. �
Optical systems with intensity amplif iers still constitute a quite new f ield of
optics. It is, therefore, at present diff icult to assess their possibilities and
problems that may arise in development. Iv2vertheless, already the great future
foreseen for optical systems with intensity amplif iers can be assessed.
There are now high-resolution photographic materials that make it poss~bl:e to
record high-quality images on a small area. The use of these materials can
substantia.lly reduce the area of the frame in motion films. This would lead to
a sharp drop in demand for cine f ilm and silver, which is in short supply, and
would reduce the size of cinematographic equipment. However, given the present
projection equipment, it is not possible to do this because the light loads on
the film during projection onto a screen are already extremely great. The use
of intensity amplifiers could provide a radical solution to this problem.
Def inite prospects have also been opened up for developing new systems for projecting
tele~ision. The use of an intensity amplifier in projection would make it possible
to substantially reduce the light load on the information medium, which in this
case could be a controlled reflector or diapositive. In principle, in this case,
too, the size of the information medium, controlled, for example, by microelectronics,
could be reduced to down to 1 micrometer, and adequate illumination on the screened
would be obtained by intensity amplif iers of the required sizes.
Yet another possibility that could already be developed relatively simply is to
take photomicrographs at a frame speed of 10-20 kHz. For thi~, all that is required
is to scan in time the images received at the amplifier output, since the duration ~
of image reproduction for lasers now in use is 10-30 ndnoseconds.
Of coursey great opportunities also exist for the development of laser microprojectors.
The various versions ef microprojectors with intensity amplifiers still need to
be worked out: polarized and interference microscopes, stereomicroscopes, systems
with phase contrast and so forth. The possibility exists of considerably improving
methods for mircotreatment with a laser beam with monitoring on the screen of the
microprojecto1.
Great possibilities for the use of the intensity amplifier are also being opened
up for infrared technology. Within the IR spectral range it is easier to obtain
- suff iciently high amplification, and therefore realization of these amplifiers
should be simple. In this spectral range, for example, it is easier to build an
amplifier that operates in continuous mode, or an amplif ier with a broad ampl3f ication
band. On the other hand, the visualization of inf rared images present great
difficulties which would be much easier to overcome if the image were formed by
- a beam of suff icient power, and here 3t is possible to used a low-sensitivity
visualizer of nonlinear conversions.
- Attractive possibilities f or using inten~ity amplif iers exist in holography. The
use of the amplifiers in recording of holograms would mak~ it possible to use
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~ low-sensitivity recording mediums or sharply reduce recording time. At the stage
of reproduction the ~.mplifi.ers would make it possible to substantially reduce the
, light load on the hologram and it would be possible to use k~olograms with low
diffractive efficiency, retaining high -~ntensity at the output thanks to amplification.
This could turn out to be especially important for dyanmic holography.
The list of prospects for the development of optical systems with inte_isity
amplifiers, and the problems occurring in their development and extensive spread
~ could, of course, be continued, but what has been said is enough to conclude that
these prospects are very interesting and that it is tima to start serious work
on the broad development of optical systema with intensity amplifiers.
To summarize: intensity amplifiers have already been developed and tested on the
- basis of a number of pulsed lasers operating on metal vapors. They have turned
- out to be quite suitable in the development of ir_struments designed for specific
practical applications. With their aid it has already been possible to solve a
problem that could not be solve~ on the basis of traditional optical instruments.
The development of these amplif.iers has also made it possible to embark on studies
of the features af optical systems with intenaity amplifiers and to develop their
physical bases, and also to develop new instruments for practical applications.
This work, however is still being carried on within a very narrow framework and -
with little effort, which does not accord with the important prospects being opened
up in optics by the use of intensity amplif iers.
COPYRIGHT: Izdatel'stvo "Nauka", "Vestnik Akademii nauk SSSR", 1982
' 9642
CSO: 1863/151
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ELEKTRONIKA B3-19M CALCULATOR IiANDB00K
Moscow TEKHNIKA VYCHISLENIY NA MIKROKAL'KULYATORE "ELEKTRONIKA B3-19M" in Russian
1981 (signed to press 2 Dec 81) pp 2, 5-6, 8, 10-13, 166-.167
[Annotation, excerpts from chapter 1, and tabl~. of contents from bo~~~ ''Doing
Calculations on the 'Elektronika B3-19M' Calculator", by Mikhail Ivanovich Petrov,
Izdatel'stvo "Finansy i statistika", 15,000 copies, 168 pages]
[Excerpts] The book deals with methods and practice in doing calculations on the
"Elektronika B3-19M" calculator. Examples are shown for solving systems of linear
and nonlinear equations, numerical function integration and differentiation, and
integration of difterential equations, and questions of soZving problems in economics
are considered. Each chapter contains examples for the reader himself to solve;
answers are provided.
The book is intended for scientific-engineering and scientific workers, economists
and W7. stduents.
~ The time taken to carry out arithmetical operations is less than 0.2 sec. Average
time for determining functions ln x, lg x, sine a, cos a, tg a, aresin x, arccos
x, and arctg x is less than 2 seconds. 1Kaximum absolute error wYien using the
arithmetic functions is less than unity for the sma.llest digit of a number.
Absolute and relative error occurring in determination of functions calculated
by the calculator are indicated in the appropriate sections of the text.
The calculator is powered by four D0,55SU1,1 batteries or from a 220V 50Hz power
supply. The batteries provide continuous operation of the calculator f or 3 hours,
after which they must be recharged from a mains power supply. Maximum power
consumption is 0.8 W. Power consumption from an AC power supply, taking battery
- recharging into account, is less than 7 W.
The calculator is designed to operat~~ within a temperature range of 10-35�C at
relative air humidity of 30-80% and a barometric pressure of 760�25 ~mHg. Overall
- dimensions are 166.5 X 86 X 41 mm and the weight is less ti~an 0.4 kg.
The arithmetic-logic device is for arithmetic and logic operations on f igures and
commands (codes). It is based on an adder and X, Y, and Z registers (K145IK3 and
K145IK4 microcircuits).
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sHn.p~
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' �~lIEHTPOHNHA 63-19M�
_ c.Q~ii~ .
~sin cos "tan x�m
~ ~ertSin arccos erct~n m.z
o~oo
' t ' 7ttY ~ CF
! LLL~O
;
Figure 1.1 The "Elektronika B3-19M" Calculator
l '
The count control device is used to synchronize and coordinate the operation of
all elements in the electronics package during the com~uting process. $ync?nronization
is effected by passing to the elements of the electronics package controls signals '
obtained from a TG time-pulse generator (K1GF651 microcircuit). Frequency of the
synchronization pulse train is 70#5 kHz.
, The data input and output control device distributes data inputted via the keyboard
to the appropriate assemblies of the calculator and controls its output~on the
' indicator device. Transistor based matching elements are used for t~e combined
operation of the indicator and the devices built on microcircuits.
Storage consists of build-up memory (ur simply memory) and a ROM. The memory is
for holding intermediate results from computation or numbers frequently~encountered
' in a given calculation. Numbers are passed to or retrieved fro~ metnory by command
given via the keyboard. The ROM stores the programs used to handle f igures when
~ f inding functions computed by the calculator.
The indicator device enables visual monitoring of inputted numbers and readout
~ of computed results. In the calculator this device is built on the base of type
AI.S3IIA LED's and has a 12-digit display.
9
; FOR OFFICIAL USE ONLY
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FdR ~1FFIC14L USE ONLY
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- 11
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~OR OFFlCIAL USE ONLY
Contents Page
Foreword . 3
Chapter 1. T~e�"Elektronika B3-19M".Calculator 5
1.1 r,eatures and functions of the device 5
1.2 Computa~ions with the calculator 11
1.3 Recommendations for doing calculations with the ca?culator 3Z
1.4 Examples to be solved by the reader 41
Chapter 2. Percentage Calculatiuns and Proportional Division in
Economic Calculations 51
2.1 Percentage and commodity calculations 51
2.2 Caculations of money percentages 55
2.3 Proportional division and percentages applied to.a result 57
2.4 Problems for the reader 59
Chapter 3. Solving Systems of Linear Equations 61
3.1 Matrices and basic rules for working with them 61
3.2 Matrix determinants 63
3.3 Solving systems of linear equations using the Cramer foY~mula 6~s
3.~: Matrix solving of systems of linear equations 69
3.5 Ea;?usion method for solving systems of linear equations 74
3.6 Ppproximation methods in solving systems of linear equations 79
3.7 Examples for solving 85
Chapter 4. Numerical Solution of Nonlinear Equations 90
4.1 The process of isolating roots for nonlinear equations 90
4.2 Finding roots for equations by the chord and tangent method 94
4.3 Findings roots for equations by the sequ~ntial approximation��...��. 100
(iteration) method
4.4 Examples for solving 104
Chapter 5. Numerical Differentiation and Integration 106
5.1 Finite differences and their application in function differentiation � 109
5.2. Numerical function integration
5.3 Numerical integration of differential equations 113
5.4 Examples for 4olving 117
Chapter 6. Calculations Done in Planning Work 1L0
- 6.1 Network diagrams and calculating them 120
6.2 Stating a problem in linear programming and principles for solving it 127
6.3 Simplex method for solving the main problem in linear programming 134
using the calculator
6.4 Problems for solvf.ng 141
Chapter 7. Algorithm Library 144
Answers and Solutions to Problems 159
Bibliography 164
CGPYRIGHT: Izdatel'atvo "Finansy i statistika", I~81
9642
CSO: 1863/154
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MICRQPROCESSORS
unc 681. 3. oz: 6z1. 3. 049.77~..14
E21`r~ANCID-SPEED MICROF130CESSOR SETS
Moscow N!IKROPROTSE5SORNYYE KOM4LII{TY POVY5HF~iNOGO BYSTRODEYSTVIYA in Russian 1981
(signed to press 3 Nov 81) pp 2-~, 165-167
[Annotation, preface, contents & bibliogra.phy from book, "Enhanced-Speed M~.croprocessor
Set'" by Aleksa.ndr I~;anovich Berezenxo, I,gv Nikolayevich Korya.gin and Ar~ashes Ruben-
ovich Nazar'yan, Massovaya Biblioteka Inzh~nera,s Elektronika, Izd.~,tel'stvo "Ra.dio i
svya~", 25,OQ0 copies, 168 pages]
[Text~ Microprocessor 3ets are the elementary ba.sis for the cc,nstructior~ . of com-
puter hardware and devices of di~ital radioelectronic appa.ratus chaxacterized by
' high reliability, low cost, small dimensions and low power consumption.
i It is intended for Engi.n.eers engaged in the devElopment ana application of micropro-
cessors.
Preface
Microprocessor sets are the slementary ba.s#:s for t:~e const~ruction of computer hard-
ware and devices of digital radioel~ctronic apparatus characterized by high relia- ~
bility, low cost~ small dimensions and low power consumption.
Tha.nks to high spEed and interference immunity, the possibility of working in a wide
- range o.� temperatures and radiation stability, b~polax microprocessor sets based on ~
microprocessor sections made on the technological ~ircuitry ba,se of transistor=tran-
- sistor logic with Schottky diodes have obta,ined very widespread use by apparatua de-
velopers. The book presented to the rea.der ha,s also been devoted t~ this class of
microprocesscr sets.
Microprocessor sets as~ure flexibiiity of planning~ both from the point c~f view of
apparatus solutions to sa,tisfv the set productivity of aystems and from the point of
view of real.izing the necessary set of instruetions. Tt is r.ecessaxy tha.t
developer be well acquainted with a11 fea,tu~es of the structura,l. and flxnctional or-
ganiza.tion of large-scale 3.ntegratsd circuit mi.~roprocessor sets. Only in that case
will he be able to realiza the potentials of mic-:o~rrocessor se~s.
Microprocessor sets contain a bre�~ gamut of processor, interface and storage large-
scale ini;egrated circuita f~r the const~uction of equipment for va,rious purposes and
- with var9~nzs productiv~+.y, 2-, 4-~and 8-digit processor sections, 8-, 12-and 16-digit
~
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multi~liers, 2-, 3- and general purpose address register~, arithmetic expar~ers,~
lar~e-scale integrated circuits for organiza,tion of int~rrupters~ con-tr~l of the
- store of microprograms, electrically programmable storage devices with capacities of
l, 4 and 16K bits, associative storage units, buffer registers, main-line amplifiers
and commu~.ators and large-scale integrated circui~s for the orgar.ization of sy~.:.�hrvn-
ous and asynchronous exchange between processors and periphera.].s.
Transistor-transistor logic with Schottky diodes microprocessor sets consist of
laxge-scale integrated circuits of series K 589, KR1802 and KR1804~. Tn view of the
limited volume i; ~ the book only those of sE:.ries K j89 and methods of constructing
apparatus on the ba,sis of them ha.ve been examined in de~a,il. It must be noted e�-'
pecially that large-sca.le integrated circuits of different series are interchange-
able, and this permits achieving better chaxacteristics in speed, productivity, di-
mensions and power consumption in different apparatus.
Z'he book consists of seven chapters. ~hapter 1 presents basic information about the
selection of the composition and structural organization of~largs-scale integrated-
circuit micropr.ocessor sets. Chapters 2- 5 are devotea-~o description of series
K 589 large-scale integrats: circuits and questions of their appli~ation. By cha.pters
this ma,terial is arranged in the following manners i:n cha.pter 2 is a description of
the ~.inctioning of the K589 se~:ies large-sca.le integrated. circui.t and its circuitry;
in cha.pter 3 is a calculation of the time of synchronization cycles for seve~.al stan-
dard ca,ses of its realization; in cha.pter ~ the designing of central processors is
examined, the realization of apparatus and microcrogram pa -ts is shown, the develop-
ment of microcprograms by means of a"manual" assembler is shown, and examples are
presented of the execution of microprograms for add.ition, subtraction, multiplication
and division, interruptions are analyzed, etc; chapter 5 is devoted to the practical
applica,tion of ssries K ~89 large-scale integrated-circuit microprocessor sets in ap-
paratus micro-computers with a system of mini'~computer instructions and controller
for stora,ge on floppy magnetic di.sks are-e~amined. Large-scale integrat,ed circuits
of series KR18~2 are briefly described in chapter 6. Chapter 7 is devoted to a de-
scription of a system for the automa,tion of microprogramming intended for developers
of apparatus ba.sed on m~croprocessor se~s.
In presenting the ma,terial the authors strove to accent atten~ion to questions which,
ir~ spite of their importance, have still not been discussed adequately in the litera-
ture accessible to the developers of apparatus based on large-sca.le integrated-cir-
cuit microprocessor sets, or have been discussed insuf..ficiently s;~stema,tically. Ac-
_ quaintance with thsee questions mught to contribute to the proper use of microproces-
sor sets.
The authors are obliged to Doctor of Technical Sciences Professor A. G. Aleksenko
and A. V. Kobylinskiy for exa.mining the manuscript~~ and making usef~l comments.
CONTENTS p~e
Foreword 3
- Chapter 1. Structural Organization and Composition of Microprocesso~ 5
Sets (MPI{)
l.l. Classification of Microprocessor I,arge-scale Intsgrated Circuits (BIS) ~
1.2. Principles of Constructibn of MPK BIS
1.3. Composition of N1PK's and Technical Characteristics of BIS's
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- Page
Chapter 2i Series K 589 BIS Microp~p.~essor Set 15
2.1. Microprogrammed Control Unit 15
2.2. Central Processor ~lement 28
_ 2.3. Accelerated Transfer Circuit 35
2.4~. Priority Interruption Unit ~
2.5. Multi-regime Buffer Register 5Q
- 2.6. Bus Former. L3n~ Former With Inversion 55
2.7. Multi-functional Synchronizer S"'
2.8. Programma.ble 1024-B~t Permansnt Storage Unit 60
2.9. Programmable 4096-Bit Permanent Storage Unit 61
2.10. Microprocessox Set uircuitry 6z
Chapter 3. Mair_ Data, on Synchronizatinn of Series K 589 MPK ~IS 70
3.1. Synchronization of Arithnietic and Logical Opera.tions of a Processor 70
3.2. Synchroniza.tion of a Processor Control Device 77
Chapter 4. Planning of Central Pr~cessors 82
~.1. Processor Planning 8~
4.2. Microprogram Compilation 88
1~.j. Ma.croinstructions 99
4.4. Distributi on of Gontrol Memory 120
Chapter 5. REaliza,tion of Computer Hardwaxe on the Series 1~j89 MPK BIS 122
5.1. Micro-computer Based on the Kj89 MPK BIS 122
5.2. Controller for Control of Floppy Uisk Storages 131
� ~
Chapter 6. KR1802 ser~es BIS MPK 133
6.1. Arithmetic Device Z33
6.2. ~rithmetic P~xpander ~-3_5
6.3. General-purpose Re~isters 138
6.4. Information E~cha.nge BIS 139
6.5. Interface BIS ~�~'2
6.6. Serial Multiplier ~~3
607. Programmable A3apter of a Serial Inter~ace 14~6
' 6.8. 8x8 Multiplier 1~7
- 6.9. 16x16 Multiplier 1~9
6.1J. 12x12 Multiplier 152
6.11. S~:mmator ~S2
6.12. Multi-flznctional Main-13ne Gommutator IS3
6.1;. Multi-~nctional Matrix of Associative Registers 1,5~
6.1~. Programma.ble Logica.l Ma.trix 156
6.15. Programmable Permanent Sterage Unit With Organiza.tion of
2048x8 Digits 1~~'7
Chapter 7. Cross System of Microprogramming for B~.S Microprocessar Sets 15'j
7.1. Input La.no a.ge 15$
7.2. KROSSMPK Basic Modules 158
~.3. Form ax!d Goi~~position of Output Information 160
7.4. Setting Up KR~SSNIPK on a Computer 16~
~ Bibliography 165
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BIBLIOGRAPHY
1. Ka.gan, B. M., gnd.~&#~shin,`~V. V. "Mikropr~sesso~y v tsifrovykh sistemakh"
- (Microprocessors"in Digital Systems). Moscow~ Energiya., 1979�
2.. Prangishvili, I. V. "Mikroprotsess~ry i mikro-EVM" (Microporcessors and
Micro-Computers). Moscow, Energiya, 1979~ 232 P~es.
3. Vasenkov, A. A., Vorob'yev~ N. M., Dshkhunyan, ~.L., eti~al. "Mikroprotsessor-
nyye BIS i micro-EVMs Postroyeniye i primeneniye" (Microprocessors and Micro-
Computerss Construction and Application). A. A. ~Tasenkov, edito.r. l~oscow,
Sovetskoye radio, 1980, 286 pa~~s. . PZanning 3:ntegrated microcircui~. radio-,~ .
electronic appaxatus).
4. Gal'perin, M. P., Kuzmetsov, V. Ya.~ Ma.slennikov~ Yu. A., et al. "Mikro-EVM
'Elektronika S~' i ikh prtmeneniye" (Micro-Computer~ ~E~ek~ronika S~j'~~and
Their Applica.tion~ . V. M. Proleyko, editor. Moscow, Sovetskoye ra.dio, 1980,
160 pa,ges. (Massovaya Biblioteka Inzh~nera "Elektronika").
5. Vasenkov,.A, A., Konochkin, E. I., Malashe~?ich, B. M., and Shakhnov, V. A.
"Terminologiya v tekhnike mi.kroprotsessornykh integral'nykh skhem i mikro-EVM"
, (Terminology in the Technology of Microprocessor Integrated Circuits and
Micro-Computers) . NfIKROEI,Et{TROrI~ICA P~Et.TPROVD~~ICl3VXE 1~'~.B~BY ~ 1979, No 4~,
~ pp 17-19. A. A. Vasenkov and Ya. A. Fedotov~ editors. Moscow, Sovetskoye
radio.
6. Shchetenin, Yu. A., and "Vorob'yeva, V. V. "Multiflxnctional Scaling Unit."
Ibid, pp 95-1~$�
7. Berezenko, A. I. Koryagin, L. N., and Paramonov, N. N. "Microprocessor Elemen-
tary Base of Data Processing Equipment. Structural,. T echnical Means and Organi-
zation of Systems for Automa.tion of Scientific Investiga,tions (Ma,terials of the
Tenth Al1 Union School on Automation of Scientific Iveesti~,~kions). Len~ngrad
LIYaF, 1977, PP 59-63.
8. Berezenko, A. I., Koryagin, L. N., Nazar'yan, A. R., and Orlov, B. V. "Micro-
processor Set of BIS TTL With ~~chot-t~y~Diodee 5s~i.~es~'x589�" ELII{TRONNAYA
PROMYSHLENNOST'~ 1978, No 5, pp 20-21.
9. Berezenko, A. I., Berezin, V. I., Kalinin, S. Ye and Korya.gin, L. N. "Micro-
Computer Based on a Microprocessor Set of Series K~89." Ibid, No 6, pp 4~9-5~�
10. Berezenko, A. I., Koryagin, L. N., ~tc~h8h~h~~~nYn, Y~. I. "Microprocessor Set
of Bipolar BIS's." NIIKROELEKTRONTKA I POLUPR~VODN'II{OVYYE PRIBORY, 1977r No 2,
pp $0-94. Mo~cow, Sovetskoye radio.
11. Berezenko, A. I., Kasperovich, A. N., Prokopenko, V. I., Nesterekhin, Yu. B.,
fC9ryagin, L. N., and 5luyev, V. Ao "Crate Controller CAMAC Based on a Micro-
processor Set of BIS's." PRIBORY I SISTEMY UPRAVLENIYA, 1978, No 9, pp 11-14~.
12. 1977 Data Catalog of Intel, USA.
13. Nesterov, P. V. "Development and Evaluation of the Architecture of Micropro-
cessors." ZARUBEZHNAYA RADIOELEKTRONII{A, 1977~ No 4~~ pp 3z-69�
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1tN. Proleyko, V. M. "Development of Microprocessors, Micro-Computers and Sys-
~ tems Based on Them." II,II{TRONNAYA PRGMYSI~II~ENNOST'~ 1979, xo 11�;12, pp 3-6.
i
' CaPYRIGHT: Izd.atel�stvo "Radio i svya,z"' 1981
, ~174
; CSO: 8144/1086
~
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STRUGTURAL ORGAIIIZATION ~~ND COMPOSITION OF MICROPR~'!CESSOR 5ET5
Moscow rffKROPRoTSES50RNYYE KOMPZEKTY PC~VYSHENNOGO BYSTRODEYSTVIYA in Russian 1981
(signed to press 3 Nov 81) pp 5-15
[Cha.pter 1 from book "Enhanced-Speed Microprocessor Set" by Aleksandr Ivanovich
- Berezenko, Lev NiI~olayevich Koryagin and Artashes Rubenovich Nazar'yan, Massovaya
Biblioteka Zn~henera.: Elektronika~ Izd.atel'stvo "Radio i svyaz"', 25~000 copies,
168 pages]
[Text] 1.1. Classifica.tion of Microprocessor Laxge-scale Integrated Circuits (BIS~
All microprocessor BIS's can be divided into three clasaes: single-crystal micro-
computers, microprocessor sets ba,sed on single-crystal microprocessors, micropro-
cessor sets (MPK's~ ba.sed on processor sections~ or sectiona,lized MPK's (SMPi{�s).
Single-crystal micro-computers contain a central processor r?ith a fixed structure
- and system of instructions, a main memory with rsnc3~a~...a~~.esa,~d. a mask-type ROT~:
Due to limited axea of the crystal the capa.city of the main memory and permanent
memory is not more tha.n 2-3 Kbytes~ and so the area~mf their applica,tion is program-
mable controllers, commercia.l calculators, ca,sh registers, etc. Single-crystal
micro-computers are much less expensive tl~axi micro-computers ma,de with micropro-
cessor sets.
A microprocessor set based on single-crystal microprocessors includess a large-sca,le
integrated-circuit microporcessor containing a processor with with a fixed struc-
ture and inst~uctions ii~~;::ar~arge-scale integrated-circuit ROM (the ma.sk-type or
electrically programmable; a laxge-scale ira.teg~ated-circuit interface of input-
output devices (UW); a large-scale inte~a.ted circuit of controllers, generators,
timers, etc. The microprocessor set can include a ma.trix laxge-scale integrated
circuit for the realiza,tion of ordered circuits for control, communications, etc.
The fixed structure of a single-crystal mult~,processor does not permit using
microprocessor sets ba.sed on them for the construction of power~zl computer systems
and high-speed data, processing equipment. The existing ina.dequacies of MPK's axe
the limited possibilities of exchanging informa,tion with the external environment,
organiza.tion of paxa.llel processing and increase of productivity. The ca.pacity of
programs of systems constructed on the ba.sis of a single-crystalline MPK can ~each
6~i{ bytes, the time of performance of instructions ~om 2 to ln microseconds, and
the cost is the avers~ge between single-crystalline micro-computers and systems with
sectianalized MPK' f. The axea of app3.ica,tion is micro-computers, controllers, data
transmission appa.ratus, devices of automation, etc.
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' Sectiona.lized MPK's include a minimum number of BIS's, compatible with each other,
of different ~znctiona,l purpose (processor, interface~ ROM's, ma,in memories, etc),
by means of which it is passible to realize structures with different organiza,tion
_ and digit ca.pacity, a multiple of 2, 4 and 8. The instructions list is selected
by the system developer in accordance with its specific purpose and is realized by
, the microprogram method by recording in the s~ora,ge unit microprograms based on the
ma,in memory or the electrically programma,ble ROM.'s.
The breakdown into sections of the processor and interface pa,rts perm~tted creating
laxge-sca.le integrated circuits with di~ferent bus organizations combined, separate,
two-directional and also with different structural organization to:increase the in-
forma,tional capacity horizontally and vertically~ which permits realizing modulax
_ structures with highly efficieni communication between them, including also the con-
' veyer method of processing. The ca,pacity of system programs ba.sed on sectiona,lized
microprocessor sets can amourY�t'~~ several. hur.,ired kilowa.tts.
The use of SMPK's is effective in cases where maximum productivity is necessa.ry,
tha.t is, in universal and specialized computers realizing vexious instruction lists
in controllers and radio engineering equipment, and also in equipment for real-time
signal processing, digital filtrat~.on and spectrum analysis. ihose areas of appli-
_ cation cannot be realized on micro-computers and single crystalline microp~ocessors,
and so questions of the development and improvement of laxge-scale integrated-cir-
- cuit sectionalized microprocessor sets axe an important direction in the development
of microprocessor technology.
Table 1 ITsPE = central processor element]
BIS Series Number of BIS TsPE T~~
~ Technology BIS t es ~Pacity, cycle time,
~ bits microsecon~s
K 587 KMOP 4~ 1~ 2. 0
K 588 KMOP 3 16 2.0
_ K 582 I2L 5 4~ 1.75
- x 583 I2L lz 8 l. o
x 584~ z~ ~r 4 1. o
K 537 p-MOP 11 8 10
K 589 TTLSh 10 2 Q~1
KR1802 TTLSh 15 8 0.15
KR1804 TTLSh 6 4 0.12
~ Table 1 presents the SMPK's produced industirially. MPK of series K~87, K588 include
BIS of microprogrammed control devices in which instruction lists of the type NTs axe
realized for series K587 and K588, and S5 for series K536. The instruction list can
be changed by replacir_g a single photographi~~.pattern in tt:e course of BIS manufac-
ture.
1.2. Principles of Construction of MPK BIS
T he following principles ha.ve been ma.de the basis of the development of MPK BISs modu-
lar construction of systems on the ba.sis of of MPK BIS and ma.in-line organiza,tion of
communica,tion between mod.ules; arbitrarily increasa.ble digit ca.pacity; expa.ndable
- l.9
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~i4~i?(Q~~IA~Ja IiSE ONI,Y~
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. MoByne ~ ~
Maxponpo2paM- ~ 6~noK5 , , f!?IDK 3 ~
( MHnu n~MAmu ~ I ~ odp~bomKU(~J ~ odp~da~ ~ ~
~ 6~ ~ ' Moaynbq ~ ~
~ I ~ ~�i ~ onepauuoHAo2o , a,
Q~ ~ Ic L_ ycm o~cmBd
I Modynb p
ynpa6rreNrl~ Zz _
. naMAmbro 1~
M(LHp0AJ10Zp[I QHHb/E ,QQf~H67E'"
I yC.ll6duN ~ ' �~'1. ~
- I KoMadgal ~ obMeHa ~ ~ z-
c yBB ~ e ~
( ycmporicmBn15 ~
! ,NUXpOilpOLpdMMHOZO ' ` a
_ ynpa9neNUs
' X nuMAmu npoz~Mro ~ yee
7
' Il G~QN.IIbIZ'
Figure 1. Structural dia,gram of modular microprocessor
1- Control signals 10 - Mic~opxogram memory control mod.ulc~
2- Ma,in store address 11 - Conditions
3- Data in mai.n store 12 - Dat~
. 4- Microprog~a~a memory module 13 - Instruction
5- Processing unit . 14 - Module for exchange with input-output
- 6 - Address devices
7- Address control 15 -'r~icroprogra,m control device
8- Signs 16 - to program memory and data
9- Operating device module 17 - to input-output devices
, volume of general-purpose registers (RON); multi-~5,i.nctionality of B2S and their
specialization according to basic purpose (processing, control, commutation,
- intPrface, memory, etc); flxnctiona,l completeness~of MPK; the possibility of con-
structing on the ba.sis of i~TPK devices with data processing in series and in paxal-
lel; microprogram control with the realization of any known instruction lists un-
der the conditions of the user~ and also of arbitrary algorithms on the micro-
program level; logical~ electrical and con~tructive compatability of BIS and a sin-
gle principle of organization of synchronization ix} MPK -ba4ed systems.
Figure 1 presents a ba.sic structur~l. diagram of a modular microprocessor(MP) with
main-line organiza.tion of communications between the mod.ulators and microprogram
control to realize MPK equipment. The ba,sic MP modules are: a mod.ule of. operation-
- al equipment, a module of control of the store of microprograms, a module of micro-
program memory and a mod.ule of exchange w3.th input-output devices (UW) . The MPK
includes BIS by means of which each each modv.~.e, depending on the required capacity
and speed, can be realized on one, on seve~al BIS of the same kind or os~. several
different BIS.
~ Zo
F~R, OFFICYA]~'~~N~
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The operationa] eqttipmerit module is intended for processing addresses and data and
includes: units for arithmetic and logica,l calculations, a memory of general-pur-
pose registers and a local control device. Various alternative constructions
of the madule are presented on Figure 2. On Figure 2a ~~he arithmetic-logical units
- (ALU) and RON's are combined into a single BIS, and the number. of RON's does not
increase . On Fibure 2b the AI,U' s and RON' s are executed in se~:G.:rate BIS' s and can
can increase independently of one another:: the ALU's in accordance with the digit
capacity and the RON's in accordance with the digit ca.pacity and the number of re-
gisters. To increase the productivity, additionally introd.uced into the ALU's and
RON's are arithmetic expanders (AR) performing apparatus di splacements~ multiplica-
tion and division tsee Figure 2c). The line organization is different for different
BIS's: two input informa.tion lines, separate output addxess and data ~.~eries (Figure
~ 2d); two-directional d.ata ~.~nes (Figure 4e~= input and output data ~:~,~es (single-
directional and separa~ej (Figure 2f~.
~.nU My Ally ~.~;s~ a 0 AO AO ~
, P~". PON � POH (~I (Il%1 (11 (1) (l) fU (21 (P
(I) (2) (n) ~ay (~�1... '�i ~ ~
LLJ
- . . .
3 6NC 6NC 6hC
' d~' s~~~ f~ . .
' Figure 2. Variants of mod.ular structures.
~ 1- ALU 2- RON 3- BIS
The processing of instructiun informa.tion during realiza,tion a.ecording to Fig~zre 2d
is done successively with the processing of numerical informa.tion. During realiza-
tion of a module of the operating equipment on a BIS with a structure of l~e~ cor-
- responding to Figure 2e and f, the ~ame units can be used to process the instruction
informa,tion as for ca.lculation of numerica.l informa.tion, but in that ca.se it is neces-
s~.ry to use a peripheral to store the ROM address.
The module for control of the microprogra.m memory is intended for reception of an
- instruction, the calculation of successive addresses for the microgram memory, de-
pending on the signs arriving from the operating equtpment, and eacternal and inter-
nal interruptions.
The microprogram memory module is intendeded for storage of control information for
all MP modules. To realize a mod.ule, BIS's of electrically programma,ble storage
devices with a ca,pacity of l, 4 and 16K bits are included in the MPK. To organize
- the conveyer principle of microprogram control on the output of the microprocessor
memory it is necessaxy to additionally use registers with with recording on the
front, available in the standard series K155�
The module of exchange with input-output devices is intended for the re-
ception and issua.nce of information, and a.lso for the o~ganization of priority pro-
cessing during work of the microprocessor with periphe-rals. To construct the mod.ule,
21
;
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~
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the IIPK includes a BIS of priority interruptir~n, interface adapters, multi-regime
registers and line formers.
To contro~ the main lines and construct synchronization davices the set includes the
BIS of the main-line commutator and the BIS of a multi-functional synchronizing de~
vi ce .
The logical, electrica,l and cro structive compatibility of the MPK BIS is achieved ,
by a single preoentation of information with standard levels of signals TTLSh (the
input voltage Uin = 0- 0. 8 V, Uiri 2. 5� 25 v; the output vol-tage U out 0-C . 5 V~
Uout - 2'~ 5'25 V~ ~ the applica.tion of a single volta,ge of a power sourse of
5 V+5/ and plastic casings with a vertica,7. arrangment of the outputs with a spacing
of 2.5 mm and 16, 24, 28, 4~0, 42, ~I-S and 6~ outputs.
_ All BIS MPK work in the temperature range of -10 to 70�C.
1.3. Composition of MPK's and Characteristics of BIS's
The TTLSh (transistor-transistor logic with Schottky diodes) MPK consists of ~ogical
_ BIS's of series. K j89, KR1802 and KR1801 and BIS pROM of series K556 (Tables 2 and 3) .
To construct the operating device module, into the MPK are introduced two BIS MP of
' sections, the BIS of an arithmetic expander (AR), four BIS's of multipliers (YM), the
BIS of a summator (SM) and a circuit of transfer acceleration (CUP).
The central nrocessor element (TsPE) is a two-digit section with 11 single-address
RON's, two two-bit input-~.nformation lines, an input two-bit line mask, separate.
two-bit address and data lines, controlled by separate inputs. Ar.ithmetic~ logical
and shift operations are performed. The line organiza,tion corresponds to Figure 2e.
Arithmetic, logical and shift operations are performed with the possibility.of ma~k-
ing input da,ta,. Signs of equality to zero of the result and of overflow are prod.uced.
T he arithmetic expander (AR), a 16-pla~e device, performs in one cycle arithmetic,
logica,l and cyclic shifts to the left and right, and also the operation of retrieving
the number of the left unitary bit; the line organiza.tion corresponds to Figure 2e.
To organize accelerated transfer during increase of BIS TsPE and AU a circuit of ac-
celerated transfer for eight groups is used.
~ T o construct super-operative stores a module of processing and registry of inemory in
in the control device, in the MPK there axe separate BIS's of a 2- 3-and ~-address
registry memory. ~he RON ha.s 16 two-address general-purpose registers with four
place"s each:~'It increases in the number of registers and in digit ca.pacity, and the
line organization corresponds to Figure 2e . The multi-f~n.ctional ma.trix of associa-
tive registers (MAR) has four registers with eight places each, and the BIS ca,n be
re-arranged into eight ~-place registers and perform ~Znctions of associative selec-
tion. The line organization corresponds to Figure 2e. The informa,tion exchange cir-
cuit (OI) is a. 4-address register with the possibility of organizing on one of them
a counter and of comparing its contents with the contents of ano~her::~~~~s~er; the
line organiza.tion corresponds to Figure 2e .
22
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~ ,
Table 2
i
: Number Speed,
P.~wer,
; Description of BIS Designation of ~T nano-
: out uts seconds
~
~ Central processor element (TsPE) K5891K02 28 1 70
Microprogram control unit (BMU) K5891K01 ZI-0 1.2 60
, Accelerated transfer circuit (SUP) x589~o3 28 0.6 10
' Priority iiiterruption unit (BPP) K5891K14 24 0.8 80
Multi-regime buffer register (MBR) K5891r12 24 0�8 40
Lin.e former (ShF) K589AP16 16 0.7 20
- Line former with inversion (ShFI) K589AP26 16 0.7 16
Multi-~znctional synchronizing
device (MSU) K589KhI~4 16 0.8 40
- Programmable permanent storage
unit (PPZU) per 1K bits K 556PT4 16 0.7 70
For the construction of the microprogram control equipment there are BIS's of the
microprogram control unit (BNN), an electrica,lly programmable logic ma,trix (EPI,M),
a programmable permanent storage device (PPZU) with a ca.pacity of 1, 4 and 16K
bits, The BIS BNlil and EPLM are intended for the construction of a module for the
control of the store of microprograms~ and the BIS PPZU for the construction of. a
' module of microprogrammed memory. The BIS E~LM and PPZU can be used also in other
moclules and devices of the microprocessor system. The BMU contains all the ne-
cessary devices for control of the sequenc~~ of microinstructions from the micropro-
gram store of 512 words. The BIS includes flinetions in the control of interruptions
on the microprogram level. The BIS assures the storage df signs and conditional and
unconditional transitions. The EPLM on ~8 logical products realizes eight output
functions from 16 in~xt variables. A PPZU with a ca,pa,~ity of 1, 4~ and 16K bits have
an organizaticn of 256x4, 57:2x~3'.and 204~8x8 bits respectively~
- For organization of interruptions in the MP system, cons~ruction of a model for
exchange with the input-output devices and also for the realization of circuits for
the cdntrol of lines between different modules in the MPK there axe the follawing
BIS's; a priority interxuption unit (BPP), which assures priority processing in-
terruption requests, permitting realization of multi-level interruptions in systems
based on MPK's and having the possibility of increasing the number of interruptions;
a multi-regime buffer register (MBR)--a universal 8-place register with a built-in
' selective logic which has an independent trigger for the forma,tion of a request for
interruption of the central processor, intended ~or realiza,tion of many types of
interface and auxiliary devices, including data re isters and registers with strob-
' ing; a~iulti-ftiinctional commutator of main lines ~I~II{M), which commutates informa-
tion with logical processing from any of four directions into the three others. The
- line organization corresponds to Figure 2e. The programmable adapter of a success-
ive interfact (PAPI) is an 8-place increasable BIS intended for the organiza,~cion of~
series and pa,rallel reception and transmission with control of evenness or oddness.
; The BIS of the interface (I) produces the necessaxy signals for organiza.tion jointly
~
23
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Table
Number Speed,
Power, ~no-
Description of BIS Description of
out uts ~ seconds
Arithmetic device (AU) KR1802V51 42 1.2 100
Arithmetic expander (AR) KR1802VR1 42 1.2 100
General-purpose registers (RON) KR1802IR1 ~24~ 1 5~
Serial multiplier (UMP) KR1802VR2 ~2 1.2 1000 .
Paxallel multiplier (UM8) 42 1.2 100
Parallel multiplier (UM12) 64~ 3 110
Para11e1 multiplier (UM16~ 6~ 4 ' 130
Summat~r (SM) 48 1.2 50
- Multi-~nctiona.l matrix of
associative registers (MAR) ~'8 1�2 ~'0
Data exchange (0~) KR1802W1 4~2 1�2 5~
Interface {I) KR1802VV2 '?~2 1.2 100
Programmable adapter of success-
ive interface (PAPM) 28 1.0 100
Multi-regime commutator of
ma,in lines (Nd{M) ~ 1' 2 50
Programmable permaxient stora.ge 2~ p, g 80
device (PPZU) fo~r 4K~�.b~~s ~:K55~5
Programma.ble permaxient storage
device (PPZU) for 16K bits K556PT6 24~ 1.0 100
Electrica.lly programma.ble �
logical ma.trix (EPLM) K556PT1 28 1.0 , ~0
Microp.rocessor section KR1804VS1 ~0 1.2 110
Accelerated transfer circuit KR1804VR1 16 0.5 10
Control of microinstruction
address circuit KRR1804W2 20 0.65 95
Circuit for control of
f oll owing a.ddress KR1804W 3 16 0. 4 ~0
Parallel register KR18041R1 16 0~6 12
with the BIS OI of exchange of informa.tion over the combined ma.in line with asynchron-
ous and synchronrnzs exchange discipline. The multi-functional synchronizing device
(MSU) is intendEd for the construction of synchroniza.tion and control units and per-
forms functions of ~equency division with a controllable coefficient of division,
the forma.tion of discretely controllable delay of pulses, a controllable packet of
pulses and discretely contro~lable pulse length. The line former (ShF) and line
former with inversion (ShFI) conta.in four formers each to transmit and receive in-
formation respectively with. ~nd -~3th~o~~~c inversion and are intended, for transmission
of informa.tion over two-directionaJ. lines of commixnication.
. 24
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i
~ Table 4
Area of Application Speed Elementaxy Base
~
Input-output devices of computers 100 ns TsPE, BMU~ SUP, BPP, MBR,
of control and automa.tion Shf, ShFI, MSU, PPZU,(1K0
! Digital equipment of telemetry, 100 ns Ts~e, BMU, SUP~ BPP, MBR,
ra,di o communica.ti ons, radar and ShF, ShFI , MSU ~ PPZU ( iK ~
other types
Computerss
General purpose 1.4 million TsPE~ BMU, SUP, BPP, MBR,
operations~s ShF~ ShFI, MSU, PPZU (1K);
~pe~~ AU~ AR, RON, UI'~, OI, I,
PPZU (4K~, EPLM
SM computers
Modernia~ati~n 2~-mii~3bn AU, AR, RON~ UN~, OI~ I,
operations~s PPZU EPLM
New models 4 million ..I9~, I~tA$,.UM (8x8~, iJM (12x12),
operations~s trM (16x16), SM, PAPI, PPZU (1GK)
YeS computers
Modernization, peripheral 4 million M{M, MAR, UM (8x8), UM (12x12),
computers for computer xystems operations~s UM {16x115~, CM, PAPI~ PPZU (1C~iC)
Digita.l processing..of signals: 10 milf.~on 1~S{M, MAR, UM (8x8) ~ trM (16x16),
Radar, hydroloca.tion and operations~s SM~ PAPI, PPZU (1bK~
other types
~ Table 4~ presents the prineipal ~eas o~ applica,tion of BIS MPK and the speed of the
equipment during minimum apparatus expenditures with the applica,ticn of a limited
type of microcircuits is indica.ted.
COPYRIGHPs Izdatel'stvo "Radio i svyaz 1981
' ~ 2174
CSO: 8144/1086
i
25
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FOR OFFICIAL USE ONLY ~
- pgpGRAMMABLE 1024- and 4096-BIT PEi'MANENT SPORAGE tJNITS (PROM)
Moscow I~QKROPR~SESSORNYYE KOMPLII~PY PDVYSHENNOGO BYSTRODEYS_"VIXA 121 Russia.rl 1981
(signed to press 3 Nov 81) pp 60-62
[Sections 2.8 and 2.9 from book "Enhanced-Speed Microprocessor Set" by Aleksandr
Ivanovich Berezenko, Lev Nikolayevich Koryagin and Artashes Rubenovich Naz~.r'yan~
_ Ma.ssovayaBibliotekalnzhenera~lektroniSka: Izdatel'stvo "Radio i svyaz"', 25~000
copies, 168 pages~
[Text] 2.8 Programmable 1024 Bit Permanent Storage Unit
Description of its functioning. The PPZU (K5,56RT4) (Figure 27) represents a BIS of
the TTL type with Schottky diodes and is ma.d.e by meth~s bf ~h~ser by
xcalcini g
nology. The data. in the PPZU are recorded (programm ~ Y
Nichrome crosspieces by a pulse of current once during operation of the circuit.
The information is read during feeding of 0 on the two CS inputs. In any other com-
bination of signals on those inputs we have 1 on the PPZU outputs. During reading
the address code of the read word is fed to the outputs of address ~ormers AO-A7�
- From the outputs of the address formers direct and inverse va.lues of the input code
are fed to the input and output decoders. The :Cnput decoder selects one of 32 lines
of the storage matrices containing 32 bits (eight 4-bit words~. T o read one of the
eight words selected by the input decoder, output decoders axe used~ controlled by
three address inputs. F`rom the output decoders the code of the read word is fed
through the rea.ding a.mplifiers to the external load. The outputs of the reading a.m-
plifiers made according to a circuit with an open collector. The device for expan-
sion of selection provides the possibility of selecting a~circuit when the PPZU is
consolidated into large files.
Before prograiruning, 0's are recorded in the microcircuit for all addresses and digits.
2~9. programmable 4~09'6-Bit Permanent Storage Unit
Description of the work of the PPZU (K 556RT5) (Figure 28). The rs~o~d~ng of infor-
~ ma,tion in the PPZU (Programming) is done by the user through calcina,tion of Nichrome
crosspieces by a pulse of current one during the time of operation of the circuit.
Informa.tion is read during the feeding of the combina.tion 0011 on CS1~CS2~CS3�CS4~
respectively. In the presence of all other combina,tions on the inputs, logical 1
26
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is ox~ a11 the PPZU outlets. On the address inlets ~~'3-A# ~s selected ox~e of 64- rows
of the matrix. containing 64~ cells. The a,dclress inputs AO-A2 control the output
= decoder which which assures the aiul.tiplexing of one of the eight bits for each
output reading aaapli~ier. . The reading a.r.?plifiers axe ma~d.e according to a circuit
wi.th an open collector. The presence of four inpui;s of selection expansion of the
microcircuit simplifies the decoding in the creation of a large-capaci~y memory~
~ i~~c`ni~
u :
~ AD ~ ~ o . ~ .
~ 'o bN . ' ~~lampuqa ~
� ' z Q"~ ~3anoMUnarowua 3~e~renmog
~ . .
A ~ ; ~ � (f024 dum) .
~o . ` .
1
- A51 r ~ ~bLTO~ BdI,Z'0
~MOR e Z'0~~y7a f~.'l9d L
A6 ~
am p P~
mOP ~omo~ a'am�~
' 1 1 p-sB ~-?0) 9-?8 J-~ 1
A1 ~ ~
D ~
. ~ L..-_-_..~ . ~ D
&
CS2 Qf Q1 � QT Q'~
Figure 27. ~zu (x556~r4) structural circuit.
1- Address former 3- Storage elements ma,trix (102~~ bits)
2- Input decoder 1~ - Q~:~tput decoder
. A, ~ ~ -
f ~ 2 . . � 3
,c; o o . Mampuya 9aaD~ur.Qrou~us ~
~ ~ 4 � 3ACMeMlI106 (4096~u/1~J
a .
~ ~a
f; e o 0' I �
a ~ .
r
~
f~ ;~a '
/ll!l ,QU/ Q!ll ,L'-'~ .~'!J ,Q~ .C.G~ .2lU
& .
c.z
~ / ~ ~ ; > > ~
QO P1 Q2 4'J Q4 QS Q6 Q7
Figure 28. ~zu (x556x~r5) structural circuit.
1- Address ampl:.fier and former 3- Stora,ge elements ma,trix
2 - Decoder 4096 bits)
COPYRIGHr: Izdatel'stvo "Radio i svyaz"' 1981
2174
CSO: 8144/1086 .
27
FOR ~~FFICIAL USE ONLY
~
~
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FOR OFF[CIAL USE ONLY
REALIZATION OF C01~'U'PER HARDWARE ON SERIES K-589 MPK BIS
Moscow I~lIICROPROTSESSORNYYE KOMPLII{TY POVYSI~NN~GO BYSTRODEYSTVIYA in Russian 1981
(signed to press 3 Nov 81) pp 122-132
[Chapter 5 from book "Enhaxiced-Speed Microprocessor Set" by Aleksandr Ivanovich
Berezenko, . Lev Nikolayevich Koryagin and Ar~tashes Rubenovich Nazax'yan, Ma.ssovaya
Biblioteka Inzheneras Elektranika, Izd.atel'stvo "Radio i svyaz"', 25~000 copies,
, 168 pa.ges]
~ [Text] With the development of microprocessors and microprocessor sets of laxge-
scale integrated circuits the cbnstruction of computer ha.xdware and means of auto-
~ ma.tion ha.s changed substantially. Thus, the applica,tion of microprocessor sets of
BIS of series K589 on TTL circuits with Schottky diales, which ha.ve broad ~nctional
possibilities~ makes it possible to effectively solve questions in the creation of
micro- and mini-computers for wide use, automated systems for the control of techno-
logica.l processes, compu~er peripherals, etc.
The present cha.pter examines the use of I~K BIS of series K 589 for the development
of micro-computers witi~ simula.tion of the instructions list of the M-6000 mini-com-
puter and a controller to control the floppyr~magnetic disk store.
5.1. Micro-computer Based on the Se~ie'~~KS~: B15 MPK
The structure of a processor on a single plate is depicted on Figure 60. The central
processor, executed on a series K 589 BIS, consists of a matrix of central processor
elements (TsPE), a microprogram control unit (BM[1~ c~ontrolling the memory on a PP'LU
and some a.dditional circuits ~1.th a moderate degree of integration. Arranged on the
plate is a synchronaus pulse generator (GSI) which forms pulses for the TsPE, BMU and
other synchronous devices.
The arithmetic-logic device. The TsPE matrix with an accelera.ted transfer circuit
(SUP) reali~es arithmetic and logical operations~ and also the register memory of the
central processor. On the additional integrated circuits of series K155 are gathered
a tri er forbiddin
the single-di it registers of expansion (RR) and overFlow (NP r gg ~
interruption ~TrZP) and a"Stop" trigger. On the shift and transfer input of the
TsPE matrix, to perform variaus opera.tions throu~h a 4-input multiplexor can be fed
the RR contents, the largest and sma7.lest digits of the d.ata register (AS) and infor-
ma,tion ~om the FO output of the BIS BMU. To process ei~ht interruption requests,
28
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F(
~1 ~ d ~
~ ~ ~ ~ m
~ ~ ~ Q ~c v1 ~
~ ~ ~ ~ C . ~ N
^ ~ ~ ~ W
~c ! ~ ~~ay ~ ~ 9~ N ~
o ~
~ 'h ~ yVb Ne ~ ~ ~ a
~ ~Z~�, ~e�c C
b ~ ~.H
Q 1 I I
~
~ ~ b ~
v , ~ N ~ ~ 'O e ~v ~O ~ e""1 r'I r"I
V b 0~ aQi h ~ q ~ ~
.J~ti~ ~ ~
~ ~
~ ~ ~ ~
ti~ ~ ~ ~ ~
~ ~ ~
^ U
~s ~
. ~ ~ ~
~
O
~ ~
~C b ~
~ 5 ~
. ~ .o~~~~ ~C ~ ^ ~j ~
C 'a ~v~ ~ q U1
4 N Z G~~ Q`4 � ~
C ~5 E c m C E'O ~ O 4 f-I
~ a~, z~ o o, ~ . Q. '~1. ~ ON ~ �ri
` � U ~
a Q ~ ~ ~ o
~ ~ I j ~H~
~ . ~ �
v~. I : ~ ti~rn
, ~ Y q ~ N
' ~ ~ � I ~
~ I ~ r ~
A~ ! ~ ~ ~
4 W W s-i
' ~ ~ ~
_ ~ I
C ~ j v J~j ' . 1 I I
~ ~ ~ ' ~ 0 IC ' ul~
V vv v Q U I ~
~ ~ Q L_ J ~
~
e
~v cC~, y v x O
~ ~ v W ~ . ~O ~
i ~ ~ ~ ~vti ~nm ~ q�y''Oa ?r O'�~
R i�~ ~ ~ yy C�p Q~ a~ U rl H
~15~ ~FR ~~1 w
~'JC7
. I I I
N C~1
29
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Figure 60 Continued
13 - WV address 26 - Halt 38 - Instruction
14 - To TsPE + SUP 2? - Halt tri~ger register
15 - soz[r z8 - ~ 39 -~~~snt~
16 -~RNK 29 40 - Requests fxom ntic~o-
- 17 - RTA 30 - A~ computer frtmt p~.neY
18 31 _ UW Sign 41 - From RR
19 - FO - F6 32 - Readi.ng-recording 42 - PZU starts
20 - W signals 43 - To PZU
33 -~om memory address 44~ - Decoder
- 22 - Front panel operating register 45 - Data
code 34 - ZUNQ{ 4~6 - UW adu~:ess
23 - Stop BMU 47 - UW a~l~ess pre-
35 - decoder
24 - Inquiry 36 - Flag logic
25 _ Start 37 - Sign for determining
folTowing address
tCY - -
~w
tA(CLX.N�A ~
AO Ad(f~l9~ ~ .
tA~A-p
Or-Qk (n3y) ~ .
z t cur.c n ' �
� PZ M~3 �
P f- ~
X'Yr~n3)
tAfi- . tS c-CCK t)
C!-C8(C'IIIZ '
~
tw t fl- cK.t
tMt t,~'
~ .
tN
� Mr tS PI- ur. t 1
a t
Figure 61. Time dependences for calculating
a microinstruction cycle.
2 - ~PZU; 4 - ( 5 ~~P~
30
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' on the plate is arranged the BIS of a priority interruption unit (BPP). The input
and output da~a lines axe combined into a line former in a single two-directiona.l
data line. T he a.ddress line also en~erges ~`rom the plate through line farmers. T o
select one of the possible peripherals, on the plate are :tw6'~~jID4 circuits~ form-
ing the first decoder of the code of selection of the peripheral. All these addi-
i tional circuits are necessary to realize complete compatibility of pro~rams for the
_ M-6000 computer and the described micro-computer.
T o reduce the time required for execution of the register instructions a single PPZi1
circuit is used (organiza,tion 256 x~) on eight address inputs, to which the instruc-
tion positions and signs to be~analyzed axe attached, and the information outputs
serve for determination of the possible omission of the following microinstruction.
T he control equipment includes a BIS BMU (K5891K01), a microprogram memory (ZUN~C~,
a conveyer register (RgI~{) and several multiplexors (M2-M4). The conveyer register
is organized on D-triggers with recording of information on the front (K15jIRl mi-
crocircuits). The multiplexors axe necessa.ry for expansion of the flinctional possi-
bilities of +~he BMU, and also to reduce the number of successively performed micro-
~ instructions acccomplishing t~.e given instructions.
T o perform conditionaZ transitions on one of the signs not being formed during exe-
cution of the following microinstruction a 16-input multiplexor M2 serves. On its
input arrive~some digits of the microinstruction (for example, A0, A~, A6, etc) sig-
nals �~bm the control panel~ etc.
Informa.tion from that multip~exor can pass through through the 4~-input multiplexor
M3 ta the input of signs and to the ACO control input. Tha.t is done to increase the
number of possible conditional transfers in the BMU. The 4-input multiplexor is
necessary for passage to the input of the BMU signs of sign2l.s arising during exe-
cution of the following microinstruction. The multiplexor is included in the cir-
cuit beca.use the delay of passage of the signal through the 16-input multiplexor is
about 50 ns, and this involves a considerable increase of the cycle of execution o~
the microinstruction without formulation of the M2 multiplexor.
- In all types of instructions of the M6000 mini-computer there
- which determine the execution of several operations, for example digits 1-~ in re-
quest instructions, digits 6-'~, 8-9~ 7-9~ and 13-15 in register instructions and
digits 7-9 in the input-output instructions group. If it is taken into considera.-
tion tha,t the BMU c~a,n perform conditional transfers with respect to a group of digits
(for example, the BMU, JPX, JPR and JLL transfer functions), it is a.dvisa,ble to feed
one af tYie-enum~rac~gc~~ g~~up of digits on the K3 - K0~ inputs through 8-input multi-
plexors. T his makes it possible to considerably reduce the time required for execu-
tion of the instructions. Besides instruction digits onto the inputs K3 - KO of the
BMU through the multiplexors pass signals f~om the contro.7;". panel which determine
its working conditions during ha.lting o~ execution of the program, and da.ta, from the
PZU~ necessary for analysis of the pa,ssages in the group of register instructions.
To save equipment and the microinstruction memory~ all tra.nsfers by group.of digits
are ma.de through a faur-digit register of instructions of the BMU~ and so before the
conditional transfer is accomplished for the grc~up of digits using BMU transfer ~nc-
tions such as JPR, JLL, or JRI,, it is necessary to~record the values of the digits to
be analyzed in the BMU i~structions register by means of instruction JPaC.
31
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It should be noted tha.t there is no special instructions register in the process-
or. The address instruction cod.e~ after it ha,s been read in the accumulating
data, register (AS) and the memory address regist~.r (RA), which axe in the TsPE
matrix, is remembered according to the JPX instruct~~ns BMU instructions~register
and is stored there in the caurse of performance of the instruction, and in the
- RA is the effective address for return to the ROM for t~he operand.
In the register instructions and the input-output instructions the instruction
read from the ROM is remembered in the RA~ which is used later as a register of
instructions.~ At the end of the performance of a11 instructions in the RA a new
address is recorded~ one which determines the position in the ROM of the following
instruction.
Calculation of the cycle of execution of a microinstruction. The time dependences
for calculation of the microinstruction cycle axe presented on Figure 61. Two syn-
chroseries, obtained from a single generator~ serve for the synchronization of all
circuits on the processor plate. The mieroinstruction length is calculated under
the worst dyn~.mic chara.cterist+cs.o Toh~~late thetc cle fortmicroinstz
ction
of 10-70�C and a voltage of 5V_5~ y
execution, several. very critica.l pa.ths of passage of information were considerec~.,
among them the paths (and time respectively) of accompJishment of operations 3.n
the TsPE and of conditional transfers in the BMU.
At the moment of performance of a microinstruction by the fror~t of the synchro-
pulse, in the microinstructions register (TgMK) from the PZU is recorded a new
microinstruction which which in the time tP~~~L~D~ aPPears on the PrMK outputs.
After its arrival on the TsPE inputs FO - F6 KO - K1 in the time tP~F X~ equal to
52 ns, on the T sPE inputs X and Y appear signals for the accelerate~? transfer cir-
cuit whicYi with the delay tp~X_C~, equa]. to 20 ns~ isstres input~ tr~.usfe"r-~signals
to all the TspE circuits.
After the arrival of the input transfers on the T sPE inputs in the time tS~C-CIx .L ~
= 27 ns a new synchronous pulse ~~bh lengtb, of^at leas~r,.33 ns can be added. ~
In tha,t ca.se the cycle time is
tCy'- tP(CLK. L�D)~ tP(F�X tP~X.C)T tS(C-CLK . L)~ tWP "
_ - 35 52 20 27 33 -167 r~c.
When the transfer signal is used in the logic og Bl'~I[J signs the signal of the out-
put transfer must go through the MZ multiplexor which gives the delay t~ - 22 ns~
and the following synchronaus pulse on the BMU can can be fed during the time of
installation of the sign t = 15 ns.
5(FI-CLK.L)
~ In tha.t ca,se the length of the cycle is
tCY - rP (CLK.L�D) ~ tP (F�X) ~ tP (X.C~ ~ tM3~ tS (Fl�CLK.L) ~
tW p = 35 52 20 l2 -~-15 33 =17? Hc. , ~
,
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FOR OFFI(
; The length of accomplishment of a microinstruction during passage of a signa,l
! through a 16-input multiplexor M2 under the condition that on the inputs of tha,t
' multiplexor the in~ormaticn ha.s been established in advance, i~ equal to
~ t - t ~ tA{q T~e ~ fM3~tM3~fS (Ff~CLK.L) ~ fWP'
~ Cy - P ICLK.L.D)
where tM2 is the delay of the signal during passage through the 16-input multi-
plexor, equal to 52 ns; t. = 22 ns is the informati~rn delay in the invertor which
` serves for transfer into ~he prescribed cell of the microprogram memory ~or both
the zero and the unit value of the level.
The cycle time is
t~,. = 35 b2 22 -}-15 33 -179 Hc.
The program control unit ha.s a limi~ced number of possib:.e conditional transfers.
- To increase the number and types of conditional tra.nsfe~rs a circuit o~ additiona,l
conditional transfer was developed which makes it possible to add a i;ransfer s'~gn
to the BMU ACO input. The sign for the additional transfer is selected ~sy the
j irtultiplexor M2 and through microcircuits which ha.ve the delays tM �~2 ns an~
tDP = 22 ns respectively a.nd will fall on the input ACO. The tim~ for establish-
ment of informa.tion on the AG input t~ = 1~ ns.
The cycle time during additional conditiona,l transfer_is
~ ~-t, -{-1;~~^_~tn~3~rz,~-~_~.�y_~